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Fix PR18162 - Incorrect assertion assumed that the SDValue resno is zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196858 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -9859,7 +9859,7 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
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if (N->getNumOperands() == 2 &&
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N->getOperand(1)->getOpcode() == ISD::UNDEF) {
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SDValue In = N->getOperand(0);
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assert(In->getValueType(0).isVector() && "Must concat vectors");
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assert(In.getValueType().isVector() && "Must concat vectors");
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// Transform: concat_vectors(scalar, undef) -> scalar_to_vector(sclr).
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if (In->getOpcode() == ISD::BITCAST &&
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27
test/CodeGen/X86/pr18162.ll
Normal file
27
test/CodeGen/X86/pr18162.ll
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@ -0,0 +1,27 @@
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; RUN: llc < %s
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; Make sure we are not crashing on this one.
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target triple = "x86_64-unknown-linux-gnu"
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%"Iterator" = type { i32* }
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declare { i64, <2 x float> } @Call()
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declare { i64, <2 x float> }* @CallPtr()
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define { i64, <2 x float> } @Foo(%"Iterator"* %this) {
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entry:
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%retval = alloca i32
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%this.addr = alloca %"Iterator"*
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%this1 = load %"Iterator"** %this.addr
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%bundle_ = getelementptr inbounds %"Iterator"* %this1, i32 0, i32 0
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%0 = load i32** %bundle_
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%1 = call { i64, <2 x float> } @Call()
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%2 = call { i64, <2 x float> }* @CallPtr()
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%3 = getelementptr { i64, <2 x float> }* %2, i32 0, i32 1
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%4 = extractvalue { i64, <2 x float> } %1, 1
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store <2 x float> %4, <2 x float>* %3
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%5 = load { i64, <2 x float> }* %2
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ret { i64, <2 x float> } %5
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}
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