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Revision r128665 added an optimization to make use of NEON multiplier
accumulator forwarding. Specifically (from SVN log entry): Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier accumulator forwarding: vadd d3, d0, d1 vmul d3, d3, d2 => vmul d3, d0, d2 vmla d3, d1, d2 Make sure it catches cases where operand 1 is add/fadd/sub/fsub, which was intended in the original revision. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133127 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5687,7 +5687,7 @@ static SDValue PerformVMULCombine(SDNode *N,
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unsigned Opcode = N0.getOpcode();
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if (Opcode != ISD::ADD && Opcode != ISD::SUB &&
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Opcode != ISD::FADD && Opcode != ISD::FSUB) {
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Opcode = N0.getOpcode();
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Opcode = N1.getOpcode();
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if (Opcode != ISD::ADD && Opcode != ISD::SUB &&
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Opcode != ISD::FADD && Opcode != ISD::FSUB)
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return SDValue();
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@ -492,3 +492,25 @@ entry:
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store <8 x i8> %10, <8 x i8>* %11, align 8
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ret void
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}
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define void @distribute2_commutative(%struct.uint8x8_t* nocapture %dst, i8* %src, i32 %mul) nounwind {
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entry:
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; CHECK: distribute2_commutative
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; CHECK-NOT: vadd.i8
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; CHECK: vmul.i8
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; CHECK: vmla.i8
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%0 = trunc i32 %mul to i8
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%1 = insertelement <8 x i8> undef, i8 %0, i32 0
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%2 = shufflevector <8 x i8> %1, <8 x i8> undef, <8 x i32> zeroinitializer
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%3 = tail call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %src, i32 1)
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%4 = bitcast <16 x i8> %3 to <2 x double>
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%5 = extractelement <2 x double> %4, i32 1
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%6 = bitcast double %5 to <8 x i8>
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%7 = extractelement <2 x double> %4, i32 0
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%8 = bitcast double %7 to <8 x i8>
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%9 = add <8 x i8> %6, %8
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%10 = mul <8 x i8> %2, %9
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%11 = getelementptr inbounds %struct.uint8x8_t* %dst, i32 0, i32 0
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store <8 x i8> %10, <8 x i8>* %11, align 8
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ret void
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}
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