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Mem2Reg does not need TargetData.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36444 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Devang Patel
2007-04-25 18:32:35 +00:00
parent c0fabcbabe
commit 68c01b3cf3
4 changed files with 9 additions and 15 deletions
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4
lib/Transforms/Scalar/LICM.cpp
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@ -555,7 +555,7 @@ void LICM::sink(Instruction &I) {
if (AI) { if (AI) {
std::vector<AllocaInst*> Allocas; std::vector<AllocaInst*> Allocas;
Allocas.push_back(AI); Allocas.push_back(AI);
PromoteMemToReg(Allocas, *ET, *DF, AA->getTargetData(), CurAST); PromoteMemToReg(Allocas, *ET, *DF, CurAST);
} }
} }
} }
@ -736,7 +736,7 @@ void LICM::PromoteValuesInLoop() {
PromotedAllocas.reserve(PromotedValues.size()); PromotedAllocas.reserve(PromotedValues.size());
for (unsigned i = 0, e = PromotedValues.size(); i != e; ++i) for (unsigned i = 0, e = PromotedValues.size(); i != e; ++i)
PromotedAllocas.push_back(PromotedValues[i].first); PromotedAllocas.push_back(PromotedValues[i].first);
PromoteMemToReg(PromotedAllocas, *ET, *DF, AA->getTargetData(), CurAST); PromoteMemToReg(PromotedAllocas, *ET, *DF, CurAST);
} }
/// FindPromotableValuesInLoop - Check the current loop for stores to definite /// FindPromotableValuesInLoop - Check the current loop for stores to definite

3
lib/Transforms/Scalar/ScalarReplAggregates.cpp
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@ -104,7 +104,6 @@ bool SROA::runOnFunction(Function &F) {
bool SROA::performPromotion(Function &F) { bool SROA::performPromotion(Function &F) {
std::vector<AllocaInst*> Allocas; std::vector<AllocaInst*> Allocas;
const TargetData &TD = getAnalysis<TargetData>();
ETForest &ET = getAnalysis<ETForest>(); ETForest &ET = getAnalysis<ETForest>();
DominanceFrontier &DF = getAnalysis<DominanceFrontier>(); DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
@ -124,7 +123,7 @@ bool SROA::performPromotion(Function &F) {
if (Allocas.empty()) break; if (Allocas.empty()) break;
PromoteMemToReg(Allocas, ET, DF, TD); PromoteMemToReg(Allocas, ET, DF);
NumPromoted += Allocas.size(); NumPromoted += Allocas.size();
Changed = true; Changed = true;
} }

5
lib/Transforms/Utils/Mem2Reg.cpp
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@ -19,7 +19,6 @@
#include "llvm/Analysis/Dominators.h" #include "llvm/Analysis/Dominators.h"
#include "llvm/Instructions.h" #include "llvm/Instructions.h"
#include "llvm/Function.h" #include "llvm/Function.h"
#include "llvm/Target/TargetData.h"
#include "llvm/ADT/Statistic.h" #include "llvm/ADT/Statistic.h"
#include "llvm/Support/Compiler.h" #include "llvm/Support/Compiler.h"
using namespace llvm; using namespace llvm;
@ -38,7 +37,6 @@ namespace {
virtual void getAnalysisUsage(AnalysisUsage &AU) const { virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<ETForest>(); AU.addRequired<ETForest>();
AU.addRequired<DominanceFrontier>(); AU.addRequired<DominanceFrontier>();
AU.addRequired<TargetData>();
AU.setPreservesCFG(); AU.setPreservesCFG();
// This is a cluster of orthogonal Transforms // This is a cluster of orthogonal Transforms
AU.addPreserved<UnifyFunctionExitNodes>(); AU.addPreserved<UnifyFunctionExitNodes>();
@ -54,7 +52,6 @@ namespace {
bool PromotePass::runOnFunction(Function &F) { bool PromotePass::runOnFunction(Function &F) {
std::vector<AllocaInst*> Allocas; std::vector<AllocaInst*> Allocas;
const TargetData &TD = getAnalysis<TargetData>();
BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
@ -75,7 +72,7 @@ bool PromotePass::runOnFunction(Function &F) {
if (Allocas.empty()) break; if (Allocas.empty()) break;
PromoteMemToReg(Allocas, ET, DF, TD); PromoteMemToReg(Allocas, ET, DF);
NumPromoted += Allocas.size(); NumPromoted += Allocas.size();
Changed = true; Changed = true;
} }

12
lib/Transforms/Utils/PromoteMemoryToRegister.cpp
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@ -90,7 +90,6 @@ namespace {
SmallVector<AllocaInst*, 16> &RetryList; SmallVector<AllocaInst*, 16> &RetryList;
ETForest &ET; ETForest &ET;
DominanceFrontier &DF; DominanceFrontier &DF;
const TargetData &TD;
/// AST - An AliasSetTracker object to update. If null, don't update it. /// AST - An AliasSetTracker object to update. If null, don't update it.
/// ///
@ -128,9 +127,8 @@ namespace {
public: public:
PromoteMem2Reg(const std::vector<AllocaInst*> &A, PromoteMem2Reg(const std::vector<AllocaInst*> &A,
SmallVector<AllocaInst*, 16> &Retry, ETForest &et, SmallVector<AllocaInst*, 16> &Retry, ETForest &et,
DominanceFrontier &df, const TargetData &td, DominanceFrontier &df, AliasSetTracker *ast)
AliasSetTracker *ast) : Allocas(A), RetryList(Retry), ET(et), DF(df), AST(ast) {}
: Allocas(A), RetryList(Retry), ET(et), DF(df), TD(td), AST(ast) {}
void run(); void run();
@ -806,12 +804,12 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
/// ///
void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas, void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
ETForest &ET, DominanceFrontier &DF, ETForest &ET, DominanceFrontier &DF,
const TargetData &TD, AliasSetTracker *AST) { AliasSetTracker *AST) {
// If there is nothing to do, bail out... // If there is nothing to do, bail out...
if (Allocas.empty()) return; if (Allocas.empty()) return;
SmallVector<AllocaInst*, 16> RetryList; SmallVector<AllocaInst*, 16> RetryList;
PromoteMem2Reg(Allocas, RetryList, ET, DF, TD, AST).run(); PromoteMem2Reg(Allocas, RetryList, ET, DF, AST).run();
// PromoteMem2Reg may not have been able to promote all of the allocas in one // PromoteMem2Reg may not have been able to promote all of the allocas in one
// pass, run it again if needed. // pass, run it again if needed.
@ -829,7 +827,7 @@ void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
NewAllocas.assign(RetryList.begin(), RetryList.end()); NewAllocas.assign(RetryList.begin(), RetryList.end());
RetryList.clear(); RetryList.clear();
PromoteMem2Reg(NewAllocas, RetryList, ET, DF, TD, AST).run(); PromoteMem2Reg(NewAllocas, RetryList, ET, DF, AST).run();
NewAllocas.clear(); NewAllocas.clear();
} }
} }