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https://github.com/c64scene-ar/llvm-6502.git
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remove PPCMachOWriterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95111 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
b5c5160a55
commit
6914b8611a
@ -19,7 +19,6 @@ add_llvm_target(PowerPCCodeGen
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PPCISelDAGToDAG.cpp
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PPCISelLowering.cpp
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PPCJITInfo.cpp
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PPCMachOWriterInfo.cpp
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PPCMCAsmInfo.cpp
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PPCPredicates.cpp
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PPCRegisterInfo.cpp
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@ -1,152 +0,0 @@
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//===-- PPCMachOWriterInfo.cpp - Mach-O Writer Info for the PowerPC -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements Mach-O writer information for the PowerPC backend.
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//
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//===----------------------------------------------------------------------===//
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#include "PPCMachOWriterInfo.h"
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#include "PPCRelocations.h"
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#include "PPCTargetMachine.h"
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#include "llvm/CodeGen/MachORelocation.h"
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#include "llvm/Support/OutputBuffer.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <cstdio>
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using namespace llvm;
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PPCMachOWriterInfo::PPCMachOWriterInfo(const PPCTargetMachine &TM)
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: TargetMachOWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64 ?
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HDR_CPU_TYPE_POWERPC64 :
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HDR_CPU_TYPE_POWERPC,
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HDR_CPU_SUBTYPE_POWERPC_ALL) {}
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PPCMachOWriterInfo::~PPCMachOWriterInfo() {}
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/// GetTargetRelocation - For the MachineRelocation MR, convert it to one or
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/// more PowerPC MachORelocation(s), add the new relocations to the
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/// MachOSection, and rewrite the instruction at the section offset if required
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/// by that relocation type.
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unsigned PPCMachOWriterInfo::GetTargetRelocation(MachineRelocation &MR,
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unsigned FromIdx,
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unsigned ToAddr,
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unsigned ToIdx,
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OutputBuffer &RelocOut,
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OutputBuffer &SecOut,
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bool Scattered,
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bool isExtern) const {
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unsigned NumRelocs = 0;
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uint64_t Addr = 0;
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// Get the address of whatever it is we're relocating, if possible.
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if (!isExtern)
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Addr = (uintptr_t)MR.getResultPointer() + ToAddr;
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switch ((PPC::RelocationType)MR.getRelocationType()) {
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default: llvm_unreachable("Unknown PPC relocation type!");
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case PPC::reloc_absolute_low_ix:
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llvm_unreachable("Unhandled PPC relocation type!");
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break;
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case PPC::reloc_vanilla:
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{
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// FIXME: need to handle 64 bit vanilla relocs
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MachORelocation VANILLA(MR.getMachineCodeOffset(), ToIdx,
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false, 2, isExtern,
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PPC_RELOC_VANILLA,
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Scattered, (intptr_t)MR.getResultPointer());
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++NumRelocs;
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if (Scattered) {
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RelocOut.outword(VANILLA.getPackedFields());
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RelocOut.outword(VANILLA.getAddress());
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} else {
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RelocOut.outword(VANILLA.getAddress());
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RelocOut.outword(VANILLA.getPackedFields());
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}
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intptr_t SymbolOffset;
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if (Scattered)
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SymbolOffset = Addr + MR.getConstantVal();
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else
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SymbolOffset = Addr;
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printf("vanilla fixup: sec_%x[%x] = %x\n", FromIdx,
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unsigned(MR.getMachineCodeOffset()),
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unsigned(SymbolOffset));
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SecOut.fixword(SymbolOffset, MR.getMachineCodeOffset());
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}
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break;
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case PPC::reloc_pcrel_bx:
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{
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// FIXME: Presumably someday we will need to branch to other, non-extern
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// functions too. Need to figure out some way to distinguish between
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// target is BB and target is function.
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if (isExtern) {
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MachORelocation BR24(MR.getMachineCodeOffset(), ToIdx, true, 2,
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isExtern, PPC_RELOC_BR24, Scattered,
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(intptr_t)MR.getMachineCodeOffset());
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RelocOut.outword(BR24.getAddress());
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RelocOut.outword(BR24.getPackedFields());
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++NumRelocs;
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}
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Addr -= MR.getMachineCodeOffset();
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Addr >>= 2;
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Addr &= 0xFFFFFF;
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Addr <<= 2;
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Addr |= (SecOut[MR.getMachineCodeOffset()] << 24);
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Addr |= (SecOut[MR.getMachineCodeOffset()+3] & 0x3);
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SecOut.fixword(Addr, MR.getMachineCodeOffset());
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break;
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}
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case PPC::reloc_pcrel_bcx:
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{
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Addr -= MR.getMachineCodeOffset();
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Addr &= 0xFFFC;
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SecOut.fixhalf(Addr, MR.getMachineCodeOffset() + 2);
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break;
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}
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case PPC::reloc_absolute_high:
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{
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MachORelocation HA16(MR.getMachineCodeOffset(), ToIdx, false, 2,
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isExtern, PPC_RELOC_HA16);
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MachORelocation PAIR(Addr & 0xFFFF, 0xFFFFFF, false, 2, isExtern,
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PPC_RELOC_PAIR);
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NumRelocs = 2;
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RelocOut.outword(HA16.getRawAddress());
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RelocOut.outword(HA16.getPackedFields());
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RelocOut.outword(PAIR.getRawAddress());
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RelocOut.outword(PAIR.getPackedFields());
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Addr += 0x8000;
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SecOut.fixhalf(Addr >> 16, MR.getMachineCodeOffset() + 2);
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break;
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}
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case PPC::reloc_absolute_low:
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{
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MachORelocation LO16(MR.getMachineCodeOffset(), ToIdx, false, 2,
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isExtern, PPC_RELOC_LO16);
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MachORelocation PAIR(Addr >> 16, 0xFFFFFF, false, 2, isExtern,
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PPC_RELOC_PAIR);
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NumRelocs = 2;
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RelocOut.outword(LO16.getRawAddress());
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RelocOut.outword(LO16.getPackedFields());
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RelocOut.outword(PAIR.getRawAddress());
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RelocOut.outword(PAIR.getPackedFields());
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SecOut.fixhalf(Addr, MR.getMachineCodeOffset() + 2);
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break;
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}
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}
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return NumRelocs;
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}
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@ -1,55 +0,0 @@
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//===-- PPCMachOWriterInfo.h - Mach-O Writer Info for PowerPC ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements Mach-O writer information for the PowerPC backend.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PPC_MACHO_WRITER_INFO_H
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#define PPC_MACHO_WRITER_INFO_H
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#include "llvm/Target/TargetMachOWriterInfo.h"
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namespace llvm {
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// Forward declarations
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class MachineRelocation;
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class OutputBuffer;
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class PPCTargetMachine;
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class PPCMachOWriterInfo : public TargetMachOWriterInfo {
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public:
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PPCMachOWriterInfo(const PPCTargetMachine &TM);
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virtual ~PPCMachOWriterInfo();
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virtual unsigned GetTargetRelocation(MachineRelocation &MR,
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unsigned FromIdx,
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unsigned ToAddr,
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unsigned ToIdx,
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OutputBuffer &RelocOut,
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OutputBuffer &SecOut,
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bool Scattered, bool Extern) const;
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// Constants for the relocation r_type field.
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// See <mach-o/ppc/reloc.h>
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enum {
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PPC_RELOC_VANILLA, // generic relocation
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PPC_RELOC_PAIR, // the second relocation entry of a pair
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PPC_RELOC_BR14, // 14 bit branch displacement to word address
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PPC_RELOC_BR24, // 24 bit branch displacement to word address
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PPC_RELOC_HI16, // a PAIR follows with the low 16 bits
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PPC_RELOC_LO16, // a PAIR follows with the high 16 bits
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PPC_RELOC_HA16, // a PAIR follows, which is sign extended to 32b
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PPC_RELOC_LO14 // LO16 with low 2 bits implicitly zero
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};
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};
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} // end llvm namespace
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#endif // PPC_MACHO_WRITER_INFO_H
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@ -45,7 +45,7 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
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Subtarget(TT, FS, is64Bit),
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DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
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FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
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InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
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InstrItins(Subtarget.getInstrItineraryData()) {
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if (getRelocationModel() == Reloc::Default) {
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if (Subtarget.isDarwin())
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@ -19,7 +19,6 @@
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#include "PPCJITInfo.h"
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#include "PPCInstrInfo.h"
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#include "PPCISelLowering.h"
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#include "PPCMachOWriterInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetData.h"
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@ -37,7 +36,6 @@ class PPCTargetMachine : public LLVMTargetMachine {
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PPCJITInfo JITInfo;
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PPCTargetLowering TLInfo;
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InstrItineraryData InstrItins;
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PPCMachOWriterInfo MachOWriterInfo;
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public:
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PPCTargetMachine(const Target &T, const std::string &TT,
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@ -58,9 +56,6 @@ public:
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virtual const InstrItineraryData getInstrItineraryData() const {
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return InstrItins;
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}
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virtual const PPCMachOWriterInfo *getMachOWriterInfo() const {
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return &MachOWriterInfo;
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}
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/// getLSDAEncoding - Returns the LSDA pointer encoding. The choices are
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/// 4-byte, 8-byte, and target default. The CIE is hard-coded to indicate that
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