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[AVX512] Pull pattern for subvector insert into the instruction definition
No functional change intended. Very similar to the change I made for subvector extract in r218480. test/CodeGen/X86/avx512-insert-extract.ll covers this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218928 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -309,7 +309,10 @@ multiclass vinsert_for_size<int Opcode,
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(ins VR512:$src1, From.RC:$src2, i8imm:$src3),
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"vinsert" # From.EltTypeName # "x4\t{$src3, $src2, $src1, $dst|"
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"$dst, $src1, $src2, $src3}",
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[]>, EVEX_4V, EVEX_V512;
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[(set To.RC:$dst, (vinsert_insert:$src3 (To.VT VR512:$src1),
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(From.VT From.RC:$src2),
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(iPTR imm)))]>,
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EVEX_4V, EVEX_V512;
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let mayLoad = 1 in
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def rm : AVX512AIi8<Opcode, MRMSrcMem, (outs VR512:$dst),
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@ -319,13 +322,6 @@ multiclass vinsert_for_size<int Opcode,
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[]>, EVEX_4V, EVEX_V512, EVEX_CD8<From.EltSize, CD8VT4>;
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}
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// Codegen pattern, e.g. v4i32 -> v16i32 for vinserti32x4
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def : Pat<(vinsert_insert:$ins
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(To.VT VR512:$src1), (From.VT From.RC:$src2), (iPTR imm)),
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(To.VT (!cast<Instruction>(NAME # From.EltSize # "x4rr")
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VR512:$src1, From.RC:$src2,
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(INSERT_get_vinsert_imm VR512:$ins)))>;
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// Codegen pattern with the alternative types, e.g. v2i64 -> v8i64 for
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// vinserti32x4
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def : Pat<(vinsert_insert:$ins
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