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[Sparc] Add support for inline assembly constraints which specify registers by their aliases.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199786 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju
2014-01-22 03:18:42 +00:00
parent ad8d69bfdd
commit 6a0fffd799
2 changed files with 30 additions and 0 deletions
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20
lib/Target/Sparc/SparcISelLowering.cpp
View File

@@ -2997,6 +2997,26 @@ SparcTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
case 'r':
return std::make_pair(0U, &SP::IntRegsRegClass);
}
} else if (!Constraint.empty() && Constraint.size() <= 5
&& Constraint[0] == '{' && *(Constraint.end()-1) == '}') {
// constraint = '{r<d>}'
// Remove the braces from around the name.
StringRef name(Constraint.data()+1, Constraint.size()-2);
// Handle register aliases:
// r0-r7 -> g0-g7
// r8-r15 -> o0-o7
// r16-r23 -> l0-l7
// r24-r31 -> i0-i7
uint64_t intVal = 0;
if (name.substr(0, 1).equals("r")
&& !name.substr(1).getAsInteger(10, intVal) && intVal <= 31) {
const char regTypes[] = { 'g', 'o', 'l', 'i' };
char regType = regTypes[intVal/8];
char regIdx = '0' + (intVal % 8);
char tmp[] = { '{', regType, regIdx, '}', 0 };
std::string newConstraint = std::string(tmp);
return TargetLowering::getRegForInlineAsmConstraint(newConstraint, VT);
}
}
return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);

10
test/CodeGen/SPARC/inlineasm.ll
View File

@@ -33,3 +33,13 @@ entry:
%0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 10000)
ret i32 %0
}
; CHECK-LABEL: test_constraint_reg
; CHECK: ldda [%o1] 43, %g2
; CHECK: ldda [%o1] 43, %g3
define void @test_constraint_reg(i32 %s, i32* %ptr) {
entry:
%0 = tail call i64 asm sideeffect "ldda [$1] $2, $0", "={r2},r,n"(i32* %ptr, i32 43)
%1 = tail call i64 asm sideeffect "ldda [$1] $2, $0", "={g3},r,n"(i32* %ptr, i32 43)
ret void
}