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MC/ARM/AsmParser: Minor nitty fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123175 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -26,7 +26,7 @@
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#include "llvm/ADT/Twine.h"
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using namespace llvm;
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// The shift types for register controlled shifts in arm memory addressing
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/// Shift types used for register controlled shifts in ARM memory addressing.
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enum ShiftType {
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Lsl,
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Lsr,
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@ -134,7 +134,7 @@ class ARMOperand : public MCParsedAsmOperand {
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const MCExpr *Val;
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} Imm;
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// This is for all forms of ARM address expressions
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/// Combined record for all forms of ARM address expressions.
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struct {
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unsigned BaseRegNum;
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unsigned OffsetRegNum; // used when OffsetIsReg is true
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@ -436,7 +436,7 @@ public:
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void ARMOperand::dump(raw_ostream &OS) const {
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switch (Kind) {
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case CondCode:
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OS << ARMCondCodeToString(getCondCode());
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OS << "<ARMCC::" << ARMCondCodeToString(getCondCode()) << ">";
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break;
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case CCOut:
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OS << "<ccout " << getReg() << ">";
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