make inst_begin/inst_end iterate over InstructionsByEnumValue.

Use CodeGenTarget::getInstNamespace in one place and fix it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98915 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/AsmWriterEmitter.cpp

@@ -254,10 +254,10 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
 
   for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
          E = Target.inst_end(); I != E; ++I)
-    if (!I->second.AsmString.empty() &&
+    if (!(*I)->AsmString.empty() &&
-        I->second.TheDef->getName() != "PHI")
+        (*I)->TheDef->getName() != "PHI")
       Instructions.push_back(
-        AsmWriterInst(I->second, 
+        AsmWriterInst(**I, 
                       AsmWriter->getValueAsInt("Variant"),
                       AsmWriter->getValueAsInt("FirstOperandColumn"),
                       AsmWriter->getValueAsInt("OperandSpacing")));

utils/TableGen/CodeGenTarget.cpp

@@ -120,18 +120,14 @@ const std::string &CodeGenTarget::getName() const {
 }
 
 std::string CodeGenTarget::getInstNamespace() const {
-  std::string InstNS;
-
   for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
-    InstNS = i->second.Namespace;
+    // Make sure not to pick up "TargetOpcode" by accidentally getting
-
-    // Make sure not to pick up "TargetInstrInfo" by accidentally getting
     // the namespace off the PHI instruction or something.
-    if (InstNS != "TargetInstrInfo")
+    if ((*i)->Namespace != "TargetOpcode")
-      break;
+      return (*i)->Namespace;
   }
 
-  return InstNS;
+  return "";
 }
 
 Record *CodeGenTarget::getInstructionSet() const {
@@ -300,7 +296,7 @@ GetInstByName(const char *Name,
 
 /// getInstructionsByEnumValue - Return all of the instructions defined by the
 /// target, ordered by their enum value.
-void CodeGenTarget::ComputeInstrsByEnum() {
+void CodeGenTarget::ComputeInstrsByEnum() const {
   const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
   const CodeGenInstruction *PHI = GetInstByName("PHI", Insts);
   const CodeGenInstruction *INLINEASM = GetInstByName("INLINEASM", Insts);
@@ -332,20 +328,25 @@ void CodeGenTarget::ComputeInstrsByEnum() {
   InstrsByEnum.push_back(SUBREG_TO_REG);
   InstrsByEnum.push_back(COPY_TO_REGCLASS);
   InstrsByEnum.push_back(DBG_VALUE);
-  for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
+  
-    if (&II->second != PHI &&
+  for (std::map<std::string, CodeGenInstruction>::const_iterator
-        &II->second != INLINEASM &&
+       I = Insts.begin(), E = Insts.end(); I != E; ++I) {
-        &II->second != DBG_LABEL &&
+    const CodeGenInstruction *CGI = &I->second;
-        &II->second != EH_LABEL &&
+  
-        &II->second != GC_LABEL &&
+    if (CGI != PHI &&
-        &II->second != KILL &&
+        CGI != INLINEASM &&
-        &II->second != EXTRACT_SUBREG &&
+        CGI != DBG_LABEL &&
-        &II->second != INSERT_SUBREG &&
+        CGI != EH_LABEL &&
-        &II->second != IMPLICIT_DEF &&
+        CGI != GC_LABEL &&
-        &II->second != SUBREG_TO_REG &&
+        CGI != KILL &&
-        &II->second != COPY_TO_REGCLASS &&
+        CGI != EXTRACT_SUBREG &&
-        &II->second != DBG_VALUE)
+        CGI != INSERT_SUBREG &&
-      InstrsByEnum.push_back(&II->second);
+        CGI != IMPLICIT_DEF &&
+        CGI != SUBREG_TO_REG &&
+        CGI != COPY_TO_REGCLASS &&
+        CGI != DBG_VALUE)
+      InstrsByEnum.push_back(CGI);
+  }
 }
 
 

utils/TableGen/CodeGenTarget.h

@@ -71,7 +71,7 @@ class CodeGenTarget {
   void ReadInstructions() const;
   void ReadLegalValueTypes() const;
   
-  std::vector<const CodeGenInstruction*> InstrsByEnum;
+  mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
 public:
   CodeGenTarget();
 
@@ -205,25 +205,25 @@ public:
   
   CodeGenInstruction &getInstruction(const Record *InstRec) const;  
 
-  typedef std::map<std::string,
-                   CodeGenInstruction>::const_iterator inst_iterator;
-  inst_iterator inst_begin() const { return getInstructions().begin(); }
-  inst_iterator inst_end() const { return Instructions.end(); }
-
   /// getInstructionsByEnumValue - Return all of the instructions defined by the
   /// target, ordered by their enum value.
-  const std::vector<const CodeGenInstruction*> &getInstructionsByEnumValue() {
+  const std::vector<const CodeGenInstruction*> &
+  getInstructionsByEnumValue() const {
     if (InstrsByEnum.empty()) ComputeInstrsByEnum();
     return InstrsByEnum;
   }
 
+  typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
+  inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
+  inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
+  
   
   /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
   ///
   bool isLittleEndianEncoding() const;
   
 private:
-  void ComputeInstrsByEnum();
+  void ComputeInstrsByEnum() const;
 };
 
 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern

utils/TableGen/InstrEnumEmitter.cpp

@@ -26,14 +26,7 @@ void InstrEnumEmitter::run(raw_ostream &OS) {
   CodeGenTarget Target;
 
   // We must emit the PHI opcode first...
-  std::string Namespace;
+  std::string Namespace = Target.getInstNamespace();
-  for (CodeGenTarget::inst_iterator II = Target.inst_begin(), 
-       E = Target.inst_end(); II != E; ++II) {
-    if (II->second.Namespace != "TargetOpcode") {
-      Namespace = II->second.Namespace;
-      break;
-    }
-  }
   
   if (Namespace.empty()) {
     fprintf(stderr, "No instructions defined!\n");

utils/TableGen/InstrInfoEmitter.cpp

@@ -149,7 +149,7 @@ void InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS,
   const CodeGenTarget &Target = CDP.getTargetInfo();
   for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
        E = Target.inst_end(); II != E; ++II) {
-    std::vector<std::string> OperandInfo = GetOperandInfo(II->second);
+    std::vector<std::string> OperandInfo = GetOperandInfo(**II);
     unsigned &N = OperandInfoIDs[OperandInfo];
     if (N != 0) continue;
     
@@ -214,7 +214,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
   // Emit all of the instruction's implicit uses and defs.
   for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
          E = Target.inst_end(); II != E; ++II) {
-    Record *Inst = II->second.TheDef;
+    Record *Inst = (*II)->TheDef;
     std::vector<Record*> Uses = Inst->getValueAsListOfDefs("Uses");
     if (!Uses.empty()) {
       unsigned &IL = EmittedLists[Uses];