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Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing

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things like this:

       mov r9 = 65535;;
       and r8 = r8, r9;;

To be emitted instead of:

        zxt2 r8 = r8;;

To get this back, the selector for ISD::AND should recognize this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21269 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-04-13 02:41:52 +00:00
parent c951d87fe9
commit 6ac614a4f2
1 changed files with 0 additions and 17 deletions
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17
lib/Target/IA64/IA64ISelPattern.cpp
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@ -1304,23 +1304,6 @@ pC = pA OR pB
return Result;
}
case ISD::ZERO_EXTEND_INREG: {
Tmp1 = SelectExpr(N.getOperand(0));
MVTSDNode* MVN = dyn_cast<MVTSDNode>(Node);
switch(MVN->getExtraValueType())
{
default:
Node->dump();
assert(0 && "don't know how to zero extend this type");
break;
case MVT::i8: Opc = IA64::ZXT1; break;
case MVT::i16: Opc = IA64::ZXT2; break;
case MVT::i32: Opc = IA64::ZXT4; break;
}
BuildMI(BB, Opc, 1, Result).addReg(Tmp1);
return Result;
}
case ISD::SIGN_EXTEND_INREG: {
Tmp1 = SelectExpr(N.getOperand(0));
MVTSDNode* MVN = dyn_cast<MVTSDNode>(Node);