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RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-05-18 00:18:17 +00:00
parent b5cdaa257e
commit 6ae3626a4f
6 changed files with 37 additions and 30 deletions
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16
lib/Target/ARM/ARMInstrInfo.cpp
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@ -349,33 +349,34 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
} }
void ARMInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { unsigned ARMInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
MachineFunction &MF = *MBB.getParent(); MachineFunction &MF = *MBB.getParent();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
int BOpc = AFI->isThumbFunction() ? ARM::tB : ARM::B; int BOpc = AFI->isThumbFunction() ? ARM::tB : ARM::B;
int BccOpc = AFI->isThumbFunction() ? ARM::tBcc : ARM::Bcc; int BccOpc = AFI->isThumbFunction() ? ARM::tBcc : ARM::Bcc;
MachineBasicBlock::iterator I = MBB.end(); MachineBasicBlock::iterator I = MBB.end();
if (I == MBB.begin()) return; if (I == MBB.begin()) return 0;
--I; --I;
if (I->getOpcode() != BOpc && I->getOpcode() != BccOpc) if (I->getOpcode() != BOpc && I->getOpcode() != BccOpc)
return; return 0;
// Remove the branch. // Remove the branch.
I->eraseFromParent(); I->eraseFromParent();
I = MBB.end(); I = MBB.end();
if (I == MBB.begin()) return; if (I == MBB.begin()) return 1;
--I; --I;
if (I->getOpcode() != BccOpc) if (I->getOpcode() != BccOpc)
return; return 1;
// Remove the branch. // Remove the branch.
I->eraseFromParent(); I->eraseFromParent();
return 2;
} }
void ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, unsigned ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond) const { const std::vector<MachineOperand> &Cond) const {
MachineFunction &MF = *MBB.getParent(); MachineFunction &MF = *MBB.getParent();
@ -393,12 +394,13 @@ void ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
BuildMI(&MBB, get(BOpc)).addMBB(TBB); BuildMI(&MBB, get(BOpc)).addMBB(TBB);
else else
BuildMI(&MBB, get(BccOpc)).addMBB(TBB).addImm(Cond[0].getImm()); BuildMI(&MBB, get(BccOpc)).addMBB(TBB).addImm(Cond[0].getImm());
return; return 1;
} }
// Two-way conditional branch. // Two-way conditional branch.
BuildMI(&MBB, get(BccOpc)).addMBB(TBB).addImm(Cond[0].getImm()); BuildMI(&MBB, get(BccOpc)).addMBB(TBB).addImm(Cond[0].getImm());
BuildMI(&MBB, get(BOpc)).addMBB(FBB); BuildMI(&MBB, get(BOpc)).addMBB(FBB);
return 2;
} }
bool ARMInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const { bool ARMInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const {

8
lib/Target/ARM/ARMInstrInfo.h
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@ -96,10 +96,10 @@ public:
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB, MachineBasicBlock *&FBB,
std::vector<MachineOperand> &Cond) const; std::vector<MachineOperand> &Cond) const;
virtual void RemoveBranch(MachineBasicBlock &MBB) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond) const; const std::vector<MachineOperand> &Cond) const;
virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const; virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const; virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;

8
lib/Target/Sparc/SparcInstrInfo.cpp
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@ -97,10 +97,12 @@ unsigned SparcInstrInfo::isStoreToStackSlot(MachineInstr *MI,
return 0; return 0;
} }
void SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, unsigned
MachineBasicBlock *FBB, SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
const std::vector<MachineOperand> &Cond)const{ MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond)const{
// Can only insert uncond branches so far. // Can only insert uncond branches so far.
assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!"); assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
BuildMI(&MBB, get(SP::BA)).addMBB(TBB); BuildMI(&MBB, get(SP::BA)).addMBB(TBB);
return 1;
} }

6
lib/Target/Sparc/SparcInstrInfo.h
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@ -63,9 +63,9 @@ public:
virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond) const; const std::vector<MachineOperand> &Cond) const;
}; };
} }

21
lib/Target/X86/X86InstrInfo.cpp
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@ -431,31 +431,33 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
return true; return true;
} }
void X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
MachineBasicBlock::iterator I = MBB.end(); MachineBasicBlock::iterator I = MBB.end();
if (I == MBB.begin()) return; if (I == MBB.begin()) return 0;
--I; --I;
if (I->getOpcode() != X86::JMP && if (I->getOpcode() != X86::JMP &&
GetCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID) GetCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID)
return; return 0;
// Remove the branch. // Remove the branch.
I->eraseFromParent(); I->eraseFromParent();
I = MBB.end(); I = MBB.end();
if (I == MBB.begin()) return; if (I == MBB.begin()) return 1;
--I; --I;
if (GetCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID) if (GetCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID)
return; return 1;
// Remove the branch. // Remove the branch.
I->eraseFromParent(); I->eraseFromParent();
return 2;
} }
void X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, unsigned
MachineBasicBlock *FBB, X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
const std::vector<MachineOperand> &Cond) const { MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond) const {
// Shouldn't be a fall through. // Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough"); assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) && assert((Cond.size() == 1 || Cond.size() == 0) &&
@ -470,13 +472,14 @@ void X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned Opc = GetCondBranchFromCond((X86::CondCode)Cond[0].getImm()); unsigned Opc = GetCondBranchFromCond((X86::CondCode)Cond[0].getImm());
BuildMI(&MBB, get(Opc)).addMBB(TBB); BuildMI(&MBB, get(Opc)).addMBB(TBB);
} }
return; return 1;
} }
// Two-way Conditional branch. // Two-way Conditional branch.
unsigned Opc = GetCondBranchFromCond((X86::CondCode)Cond[0].getImm()); unsigned Opc = GetCondBranchFromCond((X86::CondCode)Cond[0].getImm());
BuildMI(&MBB, get(Opc)).addMBB(TBB); BuildMI(&MBB, get(Opc)).addMBB(TBB);
BuildMI(&MBB, get(X86::JMP)).addMBB(FBB); BuildMI(&MBB, get(X86::JMP)).addMBB(FBB);
return 2;
} }
bool X86InstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const { bool X86InstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const {

8
lib/Target/X86/X86InstrInfo.h
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@ -263,10 +263,10 @@ public:
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB, MachineBasicBlock *&FBB,
std::vector<MachineOperand> &Cond) const; std::vector<MachineOperand> &Cond) const;
virtual void RemoveBranch(MachineBasicBlock &MBB) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond) const; const std::vector<MachineOperand> &Cond) const;
virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const; virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const; virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;