6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-10-25 10:27:04 +00:00
Code Issues Projects Releases Wiki Activity

Revert "R600: Non vector only instruction can be scheduled on trans unit"

Browse Source 
This reverts commit 98ce62780e.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187526 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard
2013-07-31 20:43:27 +00:00
parent 5519dc9de8
commit 6b3f6a744a
29 changed files with 92 additions and 245 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
test/CodeGen/R600/local-memory-two-objects.ll
View File

@@ -12,7 +12,7 @@
; CHECK-NEXT: .long 8
; Make sure the lds writes are using different addresses.
; CHECK: LDS_WRITE {{\** *}}{{PV|T}}[[ADDRW:[0-9]*\.[XYZW]]]
; CHECK: LDS_WRITE {{[*]*}} {{PV|T}}[[ADDRW:[0-9]*\.[XYZW]]]
; CHECK-NOT: LDS_WRITE {{[*]*}} T[[ADDRW]]
; GROUP_BARRIER must be the last instruction in a clause