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ARM range checking for so_imm operands in assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135489 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -443,10 +443,12 @@ def shift_so_reg : Operand<i32>, // reg reg imm
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// so_imm - Match a 32-bit shifter_operand immediate operand, which is an
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// so_imm - Match a 32-bit shifter_operand immediate operand, which is an
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// 8-bit immediate rotated by an arbitrary number of bits.
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// 8-bit immediate rotated by an arbitrary number of bits.
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def SOImmAsmOperand: AsmOperandClass { let Name = "ARMSOImm"; }
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def so_imm : Operand<i32>, ImmLeaf<i32, [{
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def so_imm : Operand<i32>, ImmLeaf<i32, [{
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return ARM_AM::getSOImmVal(Imm) != -1;
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return ARM_AM::getSOImmVal(Imm) != -1;
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}]> {
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}]> {
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let EncoderMethod = "getSOImmOpValue";
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let EncoderMethod = "getSOImmOpValue";
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let ParserMatchClass = SOImmAsmOperand;
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}
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}
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// Break so_imm's up into two pieces. This handles immediates with up to 16
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// Break so_imm's up into two pieces. This handles immediates with up to 16
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@ -407,6 +407,14 @@ public:
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int64_t Value = CE->getValue();
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int64_t Value = CE->getValue();
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return Value >= 0 && Value < 65536;
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return Value >= 0 && Value < 65536;
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}
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}
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bool isARMSOImm() const {
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if (Kind != Immediate)
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return false;
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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if (!CE) return false;
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int64_t Value = CE->getValue();
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return ARM_AM::getSOImmVal(Value) != -1;
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}
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bool isT2SOImm() const {
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bool isT2SOImm() const {
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if (Kind != Immediate)
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if (Kind != Immediate)
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return false;
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return false;
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@ -613,6 +621,11 @@ public:
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addExpr(Inst, getImm());
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addExpr(Inst, getImm());
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}
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}
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void addARMSOImmOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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addExpr(Inst, getImm());
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}
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void addT2SOImmOperands(MCInst &Inst, unsigned N) const {
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void addT2SOImmOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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assert(N == 1 && "Invalid number of operands!");
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addExpr(Inst, getImm());
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addExpr(Inst, getImm());
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