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mi-sched: improve regpressure tracing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190180 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -566,7 +566,8 @@ updateScheduledPressure(const std::vector<unsigned> &NewMaxPressure) {
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unsigned Limit = RegClassInfo->getRegPressureSetLimit(i);
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if (NewMaxPressure[i] > Limit ) {
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dbgs() << " " << TRI->getRegPressureSetName(i) << ": "
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<< NewMaxPressure[i] << " > " << Limit << "\n";
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<< NewMaxPressure[i] << " > " << Limit << "(+ "
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<< BotRPTracker.getLiveThru()[i] << " livethru)\n";
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}
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});
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}
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@ -2454,6 +2455,10 @@ void ConvergingScheduler::tryCandidate(SchedCandidate &Cand,
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}
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}
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}
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DEBUG(if (TryCand.RPDelta.Excess.isValid())
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dbgs() << " SU(" << TryCand.SU->NodeNum << ") "
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<< TRI->getRegPressureSetName(TryCand.RPDelta.Excess.getPSet())
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<< ":" << TryCand.RPDelta.Excess.getUnitInc() << "\n");
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// Initialize the candidate if needed.
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if (!Cand.isValid()) {
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@ -2614,7 +2619,7 @@ void ConvergingScheduler::traceCandidate(const SchedCandidate &Cand) {
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}
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#endif
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/// Pick the best candidate from the top queue.
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/// Pick the best candidate from the queue.
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///
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/// TODO: getMaxPressureDelta results can be mostly cached for each SUnit during
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/// DAG building. To adjust for the current scheduling location we need to
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