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Fix typo

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192406 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2013-10-10 23:05:37 +00:00
parent b803d6bf62
commit 6c066c044e
1 changed files with 2 additions and 2 deletions
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4
lib/Target/R600/SIISelLowering.cpp
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@ -887,8 +887,8 @@ void SITargetLowering::ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
return;
}
// This is a conservative aproach, it is possible that we can't determine
// the correct register class and copy too often, but better save than sorry.
// This is a conservative aproach. It is possible that we can't determine the
// correct register class and copy too often, but better safe than sorry.
SDValue RC = DAG.getTargetConstant(RegClass, MVT::i32);
SDNode *Node = DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS, SDLoc(),
Operand.getValueType(), Operand, RC);