mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-04-05 01:31:05 +00:00
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47746 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
parent
c7773bf90e
commit
6c231501f8
@ -113,17 +113,9 @@ bool ISD::isBuildVectorAllOnes(const SDNode *N) {
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if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
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return false;
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} else if (isa<ConstantFPSDNode>(NotZero)) {
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MVT::ValueType VT = NotZero.getValueType();
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if (VT== MVT::f64) {
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if (((cast<ConstantFPSDNode>(NotZero)->getValueAPF().
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convertToAPInt().getZExtValue())) != (uint64_t)-1)
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return false;
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} else {
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if ((uint32_t)cast<ConstantFPSDNode>(NotZero)->
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getValueAPF().convertToAPInt().getZExtValue() !=
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(uint32_t)-1)
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return false;
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}
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if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
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convertToAPInt().isAllOnesValue())
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return false;
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} else
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return false;
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@ -712,7 +704,8 @@ SelectionDAG::~SelectionDAG() {
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SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
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if (Op.getValueType() == VT) return Op;
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int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT));
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APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
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MVT::getSizeInBits(VT));
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return getNode(ISD::AND, Op.getValueType(), Op,
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getConstant(Imm, Op.getValueType()));
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}
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@ -1050,28 +1043,22 @@ SDOperand SelectionDAG::FoldSetCC(MVT::ValueType VT, SDOperand N1,
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}
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if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
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uint64_t C2 = N2C->getValue();
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const APInt &C2 = N2C->getAPIntValue();
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if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
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uint64_t C1 = N1C->getValue();
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// Sign extend the operands if required
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if (ISD::isSignedIntSetCC(Cond)) {
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C1 = N1C->getSignExtended();
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C2 = N2C->getSignExtended();
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}
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const APInt &C1 = N1C->getAPIntValue();
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switch (Cond) {
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default: assert(0 && "Unknown integer setcc!");
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case ISD::SETEQ: return getConstant(C1 == C2, VT);
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case ISD::SETNE: return getConstant(C1 != C2, VT);
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case ISD::SETULT: return getConstant(C1 < C2, VT);
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case ISD::SETUGT: return getConstant(C1 > C2, VT);
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case ISD::SETULE: return getConstant(C1 <= C2, VT);
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case ISD::SETUGE: return getConstant(C1 >= C2, VT);
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case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT);
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case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT);
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case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT);
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case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT);
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case ISD::SETULT: return getConstant(C1.ult(C2), VT);
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case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
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case ISD::SETULE: return getConstant(C1.ule(C2), VT);
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case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
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case ISD::SETLT: return getConstant(C1.slt(C2), VT);
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case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
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case ISD::SETLE: return getConstant(C1.sle(C2), VT);
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case ISD::SETGE: return getConstant(C1.sge(C2), VT);
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}
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}
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}
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@ -1749,88 +1736,42 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
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SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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SDOperand Operand) {
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unsigned Tmp1;
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// Constant fold unary operations with an integer constant operand.
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if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
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uint64_t Val = C->getValue();
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const APInt &Val = C->getAPIntValue();
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unsigned BitWidth = MVT::getSizeInBits(VT);
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switch (Opcode) {
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default: break;
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case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT);
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case ISD::SIGN_EXTEND: return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
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case ISD::ANY_EXTEND:
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case ISD::ZERO_EXTEND: return getConstant(Val, VT);
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case ISD::TRUNCATE: return getConstant(Val, VT);
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case ISD::ZERO_EXTEND:
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case ISD::TRUNCATE: return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
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case ISD::UINT_TO_FP:
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case ISD::SINT_TO_FP: {
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const uint64_t zero[] = {0, 0};
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// No compile time operations on this type.
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if (VT==MVT::ppcf128)
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break;
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APFloat apf = APFloat(APInt(MVT::getSizeInBits(VT), 2, zero));
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(void)apf.convertFromZeroExtendedInteger(&Val,
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MVT::getSizeInBits(Operand.getValueType()),
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Opcode==ISD::SINT_TO_FP,
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APFloat::rmNearestTiesToEven);
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APFloat apf = APFloat(APInt(BitWidth, 2, zero));
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(void)apf.convertFromAPInt(Val,
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Opcode==ISD::SINT_TO_FP,
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APFloat::rmNearestTiesToEven);
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return getConstantFP(apf, VT);
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}
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case ISD::BIT_CONVERT:
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if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
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return getConstantFP(BitsToFloat(Val), VT);
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return getConstantFP(Val.bitsToFloat(), VT);
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else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
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return getConstantFP(BitsToDouble(Val), VT);
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return getConstantFP(Val.bitsToDouble(), VT);
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break;
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case ISD::BSWAP:
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switch(VT) {
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default: assert(0 && "Invalid bswap!"); break;
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case MVT::i16: return getConstant(ByteSwap_16((unsigned short)Val), VT);
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case MVT::i32: return getConstant(ByteSwap_32((unsigned)Val), VT);
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case MVT::i64: return getConstant(ByteSwap_64(Val), VT);
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}
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break;
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return getConstant(Val.byteSwap(), VT);
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case ISD::CTPOP:
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switch(VT) {
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default: assert(0 && "Invalid ctpop!"); break;
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case MVT::i1: return getConstant(Val != 0, VT);
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case MVT::i8:
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Tmp1 = (unsigned)Val & 0xFF;
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return getConstant(CountPopulation_32(Tmp1), VT);
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case MVT::i16:
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Tmp1 = (unsigned)Val & 0xFFFF;
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return getConstant(CountPopulation_32(Tmp1), VT);
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case MVT::i32:
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return getConstant(CountPopulation_32((unsigned)Val), VT);
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case MVT::i64:
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return getConstant(CountPopulation_64(Val), VT);
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}
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return getConstant(Val.countPopulation(), VT);
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case ISD::CTLZ:
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switch(VT) {
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default: assert(0 && "Invalid ctlz!"); break;
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case MVT::i1: return getConstant(Val == 0, VT);
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case MVT::i8:
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Tmp1 = (unsigned)Val & 0xFF;
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return getConstant(CountLeadingZeros_32(Tmp1)-24, VT);
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case MVT::i16:
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Tmp1 = (unsigned)Val & 0xFFFF;
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return getConstant(CountLeadingZeros_32(Tmp1)-16, VT);
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case MVT::i32:
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return getConstant(CountLeadingZeros_32((unsigned)Val), VT);
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case MVT::i64:
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return getConstant(CountLeadingZeros_64(Val), VT);
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}
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return getConstant(Val.countLeadingZeros(), VT);
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case ISD::CTTZ:
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switch(VT) {
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default: assert(0 && "Invalid cttz!"); break;
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case MVT::i1: return getConstant(Val == 0, VT);
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case MVT::i8:
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Tmp1 = (unsigned)Val | 0x100;
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return getConstant(CountTrailingZeros_32(Tmp1), VT);
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case MVT::i16:
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Tmp1 = (unsigned)Val | 0x10000;
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return getConstant(CountTrailingZeros_32(Tmp1), VT);
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case MVT::i32:
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return getConstant(CountTrailingZeros_32((unsigned)Val), VT);
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case MVT::i64:
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return getConstant(CountTrailingZeros_64(Val), VT);
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}
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return getConstant(Val.countTrailingZeros(), VT);
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}
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}
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@ -2090,10 +2031,10 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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if (EVT == VT) return N1; // Not actually extending
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if (N1C) {
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int64_t Val = N1C->getValue();
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APInt Val = N1C->getAPIntValue();
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unsigned FromBits = MVT::getSizeInBits(cast<VTSDNode>(N2)->getVT());
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Val <<= 64-FromBits;
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Val >>= 64-FromBits;
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Val <<= Val.getBitWidth()-FromBits;
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Val = Val.lshr(Val.getBitWidth()-FromBits);
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return getConstant(Val, VT);
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}
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break;
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@ -2150,37 +2091,31 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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if (N1C) {
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if (N2C) {
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uint64_t C1 = N1C->getValue(), C2 = N2C->getValue();
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APInt C1 = N1C->getAPIntValue(), C2 = N2C->getAPIntValue();
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switch (Opcode) {
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case ISD::ADD: return getConstant(C1 + C2, VT);
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case ISD::SUB: return getConstant(C1 - C2, VT);
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case ISD::MUL: return getConstant(C1 * C2, VT);
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case ISD::UDIV:
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if (C2) return getConstant(C1 / C2, VT);
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if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
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break;
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case ISD::UREM :
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if (C2) return getConstant(C1 % C2, VT);
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if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
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break;
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case ISD::SDIV :
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if (C2) return getConstant(N1C->getSignExtended() /
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N2C->getSignExtended(), VT);
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if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
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break;
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case ISD::SREM :
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if (C2) return getConstant(N1C->getSignExtended() %
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N2C->getSignExtended(), VT);
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if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
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break;
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case ISD::AND : return getConstant(C1 & C2, VT);
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case ISD::OR : return getConstant(C1 | C2, VT);
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case ISD::XOR : return getConstant(C1 ^ C2, VT);
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case ISD::SHL : return getConstant(C1 << C2, VT);
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case ISD::SRL : return getConstant(C1 >> C2, VT);
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case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT);
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case ISD::ROTL :
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return getConstant((C1 << C2) | (C1 >> (MVT::getSizeInBits(VT) - C2)),
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VT);
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case ISD::ROTR :
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return getConstant((C1 >> C2) | (C1 << (MVT::getSizeInBits(VT) - C2)),
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VT);
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case ISD::SRL : return getConstant(C1.lshr(C2), VT);
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case ISD::SRA : return getConstant(C1.ashr(C2), VT);
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case ISD::ROTL : return getConstant(C1.rotl(C2), VT);
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case ISD::ROTR : return getConstant(C1.rotr(C2), VT);
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default: break;
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}
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} else { // Cannonicalize constant to RHS if commutative
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