6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-09 11:25:55 +00:00
Code Issues Projects Releases Wiki Activity

[mips] Make NOP a pseudo instruction and expand it to "sll $zero, $zero, 0".

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174546 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka
2013-02-06 21:50:15 +00:00
parent 62b055fd50
commit 6c59c9f57c
3 changed files with 7 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
lib/Target/Mips/MipsAsmPrinter.cpp
View File

@@ -66,19 +66,18 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
return; return;
} }
// Do any auto-generated pseudo lowerings.
if (emitPseudoExpansionLowering(OutStreamer, MI))
return;
MachineBasicBlock::const_instr_iterator I = MI; MachineBasicBlock::const_instr_iterator I = MI;
MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end(); MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
do { do {
MCInst TmpInst0; // Do any auto-generated pseudo lowerings.
MCInstLowering.Lower(I++, TmpInst0); if (emitPseudoExpansionLowering(OutStreamer, &*I))
continue;
MCInst TmpInst0;
MCInstLowering.Lower(I, TmpInst0);
OutStreamer.EmitInstruction(TmpInst0); OutStreamer.EmitInstruction(TmpInst0);
} while ((I != E) && I->isInsideBundle()); // Delay slot check } while ((++I != E) && I->isInsideBundle()); // Delay slot check
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

6
lib/Target/Mips/MipsInstrFormats.td
View File

@@ -366,12 +366,6 @@ class LUI_FM {
let Inst{15-0} = imm16; let Inst{15-0} = imm16;
} }
class NOP_FM {
bits<32> Inst;
let Inst{31-0} = 0;
}
class JALR_FM { class JALR_FM {
bits<5> rs; bits<5> rs;

3
lib/Target/Mips/MipsInstrInfo.td
View File

@@ -918,8 +918,7 @@ def CLO : CountLeading1<"clo", CPURegsOpnd>, CLO_FM<0x21>;
def WSBH : SubwordSwap<"wsbh", CPURegsOpnd>, SEB_FM<2, 0x20>; def WSBH : SubwordSwap<"wsbh", CPURegsOpnd>, SEB_FM<2, 0x20>;
/// No operation. /// No operation.
/// FIXME: NOP should be an alias of "sll $0, $0, 0". def NOP : PseudoSE<(outs), (ins), []>, PseudoInstExpansion<(SLL ZERO, ZERO, 0)>;
def NOP : InstSE<(outs), (ins), "nop", [], IIAlu, FrmJ>, NOP_FM;
// FrameIndexes are legalized when they are operands from load/store // FrameIndexes are legalized when they are operands from load/store
// instructions. The same not happens for stack address copies, so an // instructions. The same not happens for stack address copies, so an