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In the presence of variable sized objects, allocate an emergency spill slot.
rdar://8131327 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108008 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -724,6 +724,7 @@ ARMBaseRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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SmallVector<unsigned, 4> UnspilledCS1GPRs;
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SmallVector<unsigned, 4> UnspilledCS2GPRs;
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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// Spill R4 if Thumb2 function requires stack realignment - it will be used as
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// scratch register.
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@ -820,9 +821,16 @@ ARMBaseRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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// offset, make sure a register (or a spill slot) is available for the
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// register scavenger. Note that if we're indexing off the frame pointer, the
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// effective stack size is 4 bytes larger since the FP points to the stack
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// slot of the previous FP.
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// slot of the previous FP. Also, if we have variable sized objects in the
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// function, stack slot references will often be negative, and some of
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// our instructions are positive-offset only, so conservatively consider
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// that case to want a spill slot (or register) as well.
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// FIXME: We could add logic to be more precise about negative offsets
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// and which instructions will need a scratch register for them. Is it
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// worth the effort and added fragility?
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bool BigStack = RS &&
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estimateStackSize(MF) + (hasFP(MF) ? 4 : 0) >= estimateRSStackSizeLimit(MF);
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(estimateStackSize(MF) + (hasFP(MF) ? 4:0) >= estimateRSStackSizeLimit(MF))
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|| MFI->hasVarSizedObjects();
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bool ExtraCSSpill = false;
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if (BigStack || !CanEliminateFrame || cannotEliminateFrame(MF)) {
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@ -915,7 +923,6 @@ ARMBaseRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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// note: Thumb1 functions spill to R12, not the stack. Reserve a slot
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// closest to SP or frame pointer.
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const TargetRegisterClass *RC = ARM::GPRRegisterClass;
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MachineFrameInfo *MFI = MF.getFrameInfo();
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RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
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RC->getAlignment(),
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false));
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@ -2,11 +2,11 @@
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define void @f(i32 %a) {
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entry:
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; CHECK: mov r11, sp
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; CHECK: add r11, sp, #4
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%tmp = alloca i8, i32 %a ; <i8*> [#uses=1]
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call void @g( i8* %tmp, i32 %a, i32 1, i32 2, i32 3 )
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ret void
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; CHECK: mov sp, r11
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; CHECK: sub sp, r11, #4
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}
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declare void @g(i8*, i32, i32, i32, i32)
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