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In the presence of variable sized objects, allocate an emergency spill slot.

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rdar://8131327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108008 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2010-07-09 20:27:06 +00:00
parent 8886c495a3
commit 6c7d3a16b3
2 changed files with 12 additions and 5 deletions
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13
lib/Target/ARM/ARMBaseRegisterInfo.cpp
View File

@@ -724,6 +724,7 @@ ARMBaseRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
SmallVector<unsigned, 4> UnspilledCS1GPRs; SmallVector<unsigned, 4> UnspilledCS1GPRs;
SmallVector<unsigned, 4> UnspilledCS2GPRs; SmallVector<unsigned, 4> UnspilledCS2GPRs;
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
MachineFrameInfo *MFI = MF.getFrameInfo();
// Spill R4 if Thumb2 function requires stack realignment - it will be used as // Spill R4 if Thumb2 function requires stack realignment - it will be used as
// scratch register. // scratch register.
@@ -820,9 +821,16 @@ ARMBaseRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
// offset, make sure a register (or a spill slot) is available for the // offset, make sure a register (or a spill slot) is available for the
// register scavenger. Note that if we're indexing off the frame pointer, the // register scavenger. Note that if we're indexing off the frame pointer, the
// effective stack size is 4 bytes larger since the FP points to the stack // effective stack size is 4 bytes larger since the FP points to the stack
// slot of the previous FP. // slot of the previous FP. Also, if we have variable sized objects in the
// function, stack slot references will often be negative, and some of
// our instructions are positive-offset only, so conservatively consider
// that case to want a spill slot (or register) as well.
// FIXME: We could add logic to be more precise about negative offsets
// and which instructions will need a scratch register for them. Is it
// worth the effort and added fragility?
bool BigStack = RS && bool BigStack = RS &&
estimateStackSize(MF) + (hasFP(MF) ? 4 : 0) >= estimateRSStackSizeLimit(MF); (estimateStackSize(MF) + (hasFP(MF) ? 4:0) >= estimateRSStackSizeLimit(MF))
|| MFI->hasVarSizedObjects();
bool ExtraCSSpill = false; bool ExtraCSSpill = false;
if (BigStack || !CanEliminateFrame || cannotEliminateFrame(MF)) { if (BigStack || !CanEliminateFrame || cannotEliminateFrame(MF)) {
@@ -915,7 +923,6 @@ ARMBaseRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
// note: Thumb1 functions spill to R12, not the stack. Reserve a slot // note: Thumb1 functions spill to R12, not the stack. Reserve a slot
// closest to SP or frame pointer. // closest to SP or frame pointer.
const TargetRegisterClass *RC = ARM::GPRRegisterClass; const TargetRegisterClass *RC = ARM::GPRRegisterClass;
MachineFrameInfo *MFI = MF.getFrameInfo();
RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
RC->getAlignment(), RC->getAlignment(),
false)); false));

4
test/CodeGen/ARM/alloca.ll
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@@ -2,11 +2,11 @@
define void @f(i32 %a) { define void @f(i32 %a) {
entry: entry:
; CHECK: mov r11, sp ; CHECK: add r11, sp, #4
%tmp = alloca i8, i32 %a ; <i8*> [#uses=1] %tmp = alloca i8, i32 %a ; <i8*> [#uses=1]
call void @g( i8* %tmp, i32 %a, i32 1, i32 2, i32 3 ) call void @g( i8* %tmp, i32 %a, i32 1, i32 2, i32 3 )
ret void ret void
; CHECK: mov sp, r11 ; CHECK: sub sp, r11, #4
} }
declare void @g(i8*, i32, i32, i32, i32) declare void @g(i8*, i32, i32, i32, i32)