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Check for unallocated instruction encodings when disassembling Thumb Branch instructions (tBcc and t2Bcc).
rdar://problem/9280470 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129471 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3625,11 +3625,17 @@ bool ARMBasicMCBuilder::TryPredicateAndSBitModifier(MCInst& MI, unsigned Opcode,
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// like ARM.
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//
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// A8.6.16 B
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if (Name == "t2Bcc")
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MI.addOperand(MCOperand::CreateImm(CondCode(slice(insn, 25, 22))));
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else if (Name == "tBcc")
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MI.addOperand(MCOperand::CreateImm(CondCode(slice(insn, 11, 8))));
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else
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// Check for undefined encodings.
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unsigned cond;
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if (Name == "t2Bcc") {
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if ((cond = slice(insn, 25, 22)) >= 14)
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return false;
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MI.addOperand(MCOperand::CreateImm(CondCode(cond)));
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} else if (Name == "tBcc") {
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if ((cond = slice(insn, 11, 8)) == 14)
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return false;
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MI.addOperand(MCOperand::CreateImm(CondCode(cond)));
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} else
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MI.addOperand(MCOperand::CreateImm(ARMCC::AL));
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} else {
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// ARM instructions get their condition field from Inst{31-28}.
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11
test/MC/Disassembler/ARM/invalid-t2Bcc-thumb.txt
Normal file
11
test/MC/Disassembler/ARM/invalid-t2Bcc-thumb.txt
Normal file
@ -0,0 +1,11 @@
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# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
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# Opcode=1894 Name=t2Bcc Format=ARM_FORMAT_THUMBFRM(25)
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# -------------------------------------------------------------------------------------------------
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# | 1: 1: 1: 1| 0: 1: 1: 1| 1: 0: 1: 0| 1: 1: 1: 1| 1: 0: 0: 0| 1: 0: 1: 1| 0: 1: 0: 0| 0: 1: 0: 0|
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# -------------------------------------------------------------------------------------------------
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#
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# A8.6.16 B
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# if cond<3:1> == '111' then SEE "Related Encodings"
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0xaf 0xf7 0x44 0x8b
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@ -9,8 +9,8 @@
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# CHECK: b #30
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0x0f 0xe0
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# CHECK: b.w #-16
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0xff 0xf7 0xf8 0xaf
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# CHECK: bgt.w #-16
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0x3f 0xf7 0xf8 0xaf
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# CHECK: bfi r2, r10, #0, #1
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0x6a 0xf3 0x00 0x02
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