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R600/SI: Merge offset0 and offset1 fields for single address DS instructions v2

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Also remove unused data fields from the DS_Load_Helper class.

v2:
  - Merge fields for DS_WRITE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204269 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-03-19 22:19:39 +00:00
parent 875b3c9afd
commit 6d1781733d
2 changed files with 27 additions and 18 deletions
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35
lib/Target/R600/SIInstrInfo.td
View File

@ -383,39 +383,48 @@ class VOP3_64 <bits<9> op, string opName, list<dag> pattern> : VOP3 <
// Vector I/O classes
//===----------------------------------------------------------------------===//
class DS_Load_Helper <bits<8> op, string asm, RegisterClass regClass> : DS <
class DS_1A <bits<8> op, dag outs, dag ins, string asm, list<dag> pat> :
DS <op, outs, ins, asm, pat> {
bits<16> offset;
let offset0 = offset{7-0};
let offset1 = offset{15-8};
}
class DS_Load_Helper <bits<8> op, string asm, RegisterClass regClass> : DS_1A <
op,
(outs regClass:$vdst),
(ins i1imm:$gds, VReg_32:$addr, VReg_32:$data0, VReg_32:$data1,
i8imm:$offset0, i8imm:$offset1),
asm#" $vdst, $gds, $addr, $data0, $data1, $offset0, $offset1, [M0]",
(ins i1imm:$gds, VReg_32:$addr, i16imm:$offset),
asm#" $gds, $vdst, $addr, $offset, [M0]",
[]> {
let data0 = 0;
let data1 = 0;
let mayLoad = 1;
let mayStore = 0;
}
class DS_Store_Helper <bits<8> op, string asm, RegisterClass regClass> : DS <
class DS_Store_Helper <bits<8> op, string asm, RegisterClass regClass> : DS_1A <
op,
(outs),
(ins i1imm:$gds, VReg_32:$addr, VReg_32:$data0, VReg_32:$data1,
i8imm:$offset0, i8imm:$offset1),
asm#" $gds, $addr, $data0, $data1, $offset0, $offset1, [M0]",
(ins i1imm:$gds, VReg_32:$addr, VReg_32:$data0, i16imm:$offset),
asm#" $gds, $addr, $data0, $offset [M0]",
[]> {
let data1 = 0;
let mayStore = 1;
let mayLoad = 0;
let vdst = 0;
}
class DS_1A1D_RET <bits<8> op, string asm, RegisterClass rc> : DS <
class DS_1A1D_RET <bits<8> op, string asm, RegisterClass rc> : DS_1A <
op,
(outs rc:$vdst),
(ins i1imm:$gds, VReg_32:$addr, VReg_32:$data0, i8imm:$offset0,
i8imm:$offset1),
asm#" $gds, $vdst, $addr, $data0, $offset0, $offset1, [M0]",
(ins i1imm:$gds, VReg_32:$addr, VReg_32:$data0, i16imm:$offset),
asm#" $gds, $vdst, $addr, $data0, $offset, [M0]",
[]> {
let data1 = 0;
let mayStore = 1;
let mayLoad = 1;
let data1 = 0;
}
class MTBUF_Store_Helper <bits<3> op, string asm, RegisterClass regClass> : MTBUF <

10
lib/Target/R600/SIInstructions.td
View File

@ -1917,7 +1917,7 @@ def : Pat <
class DSReadPat <DS inst, ValueType vt, PatFrag frag> : Pat <
(frag i32:$src0),
(vt (inst 0, $src0, $src0, $src0, 0, 0))
(vt (inst 0, $src0, 0))
>;
def : DSReadPat <DS_READ_I8, i32, sextloadi8_local>;
@ -1927,12 +1927,12 @@ def : DSReadPat <DS_READ_U16, i32, az_extloadi16_local>;
def : DSReadPat <DS_READ_B32, i32, local_load>;
def : Pat <
(local_load i32:$src0),
(i32 (DS_READ_B32 0, $src0, $src0, $src0, 0, 0))
(i32 (DS_READ_B32 0, $src0, 0))
>;
class DSWritePat <DS inst, ValueType vt, PatFrag frag> : Pat <
(frag i32:$src1, i32:$src0),
(inst 0, $src0, $src1, $src1, 0, 0)
(inst 0, $src0, $src1, 0)
>;
def : DSWritePat <DS_WRITE_B8, i32, truncstorei8_local>;
@ -1940,10 +1940,10 @@ def : DSWritePat <DS_WRITE_B16, i32, truncstorei16_local>;
def : DSWritePat <DS_WRITE_B32, i32, local_store>;
def : Pat <(atomic_load_add_local i32:$ptr, i32:$val),
(DS_ADD_U32_RTN 0, $ptr, $val, 0, 0)>;
(DS_ADD_U32_RTN 0, $ptr, $val, 0)>;
def : Pat <(atomic_load_sub_local i32:$ptr, i32:$val),
(DS_SUB_U32_RTN 0, $ptr, $val, 0, 0)>;
(DS_SUB_U32_RTN 0, $ptr, $val, 0)>;
/********** ================== **********/
/********** SMRD Patterns **********/