Move CalculateRegClass to MRI::recomputeRegClass.

This function doesn't have anything to do with spill weights, and MRI
already has functions for manipulating the register class of a virtual
register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2011-08-09 16:46:27 +00:00
parent 719927a68f
commit 6d1fd0b979
5 changed files with 47 additions and 39 deletions

View File

@@ -14,7 +14,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI)
@@ -61,6 +61,37 @@ MachineRegisterInfo::constrainRegClass(unsigned Reg,
return NewRC;
}
bool
MachineRegisterInfo::recomputeRegClass(unsigned Reg, const TargetMachine &TM) {
const TargetInstrInfo *TII = TM.getInstrInfo();
const TargetRegisterInfo *TRI = TM.getRegisterInfo();
const TargetRegisterClass *OldRC = getRegClass(Reg);
const TargetRegisterClass *NewRC = TRI->getLargestLegalSuperClass(OldRC);
// Stop early if there is no room to grow.
if (NewRC == OldRC)
return false;
// Accumulate constraints from all uses.
for (reg_nodbg_iterator I = reg_nodbg_begin(Reg), E = reg_nodbg_end(); I != E;
++I) {
// TRI doesn't have accurate enough information to model this yet.
if (I.getOperand().getSubReg())
return false;
// Inline asm instuctions don't remember their constraints.
if (I->isInlineAsm())
return false;
const TargetRegisterClass *OpRC =
TII->getRegClass(I->getDesc(), I.getOperandNo(), TRI);
if (OpRC)
NewRC = getCommonSubClass(NewRC, OpRC);
if (!NewRC || NewRC == OldRC)
return false;
}
setRegClass(Reg, NewRC);
return true;
}
/// createVirtualRegister - Create and return a new virtual register in the
/// function with the specified register class.
///