From 6d339f9000055a59249cedea3ff22e497cc6bb60 Mon Sep 17 00:00:00 2001
From: Brian Gaeke <gaeke@uiuc.edu>
Date: Tue, 16 Mar 2004 22:45:42 +0000
Subject: [PATCH] Fix bug in zero-extending of shorts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12453 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Sparc/InstSelectSimple.cpp    | 4 ++--
 lib/Target/Sparc/SparcV8ISelSimple.cpp   | 4 ++--
 lib/Target/SparcV8/InstSelectSimple.cpp  | 4 ++--
 lib/Target/SparcV8/SparcV8ISelSimple.cpp | 4 ++--
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/lib/Target/Sparc/InstSelectSimple.cpp b/lib/Target/Sparc/InstSelectSimple.cpp
index 1ba42858d0e..890e55d4d3d 100644
--- a/lib/Target/Sparc/InstSelectSimple.cpp
+++ b/lib/Target/Sparc/InstSelectSimple.cpp
@@ -289,8 +289,8 @@ void V8ISel::visitBinaryOperator (BinaryOperator &I) {
         BuildMI (BB, V8::SRAri, 2, DestReg).addReg (TmpReg).addZImm (16);
       } else { // add ushort
         unsigned TmpReg = makeAnotherReg (I.getType ());
-        BuildMI (BB, V8::SLLri, 2, TmpReg).addReg (ResultReg).addZImm (24);
-        BuildMI (BB, V8::SRLri, 2, DestReg).addReg (TmpReg).addZImm (24);
+        BuildMI (BB, V8::SLLri, 2, TmpReg).addReg (ResultReg).addZImm (16);
+        BuildMI (BB, V8::SRLri, 2, DestReg).addReg (TmpReg).addZImm (16);
       }
       break;
     case cInt:
diff --git a/lib/Target/Sparc/SparcV8ISelSimple.cpp b/lib/Target/Sparc/SparcV8ISelSimple.cpp
index 1ba42858d0e..890e55d4d3d 100644
--- a/lib/Target/Sparc/SparcV8ISelSimple.cpp
+++ b/lib/Target/Sparc/SparcV8ISelSimple.cpp
@@ -289,8 +289,8 @@ void V8ISel::visitBinaryOperator (BinaryOperator &I) {
         BuildMI (BB, V8::SRAri, 2, DestReg).addReg (TmpReg).addZImm (16);
       } else { // add ushort
         unsigned TmpReg = makeAnotherReg (I.getType ());
-        BuildMI (BB, V8::SLLri, 2, TmpReg).addReg (ResultReg).addZImm (24);
-        BuildMI (BB, V8::SRLri, 2, DestReg).addReg (TmpReg).addZImm (24);
+        BuildMI (BB, V8::SLLri, 2, TmpReg).addReg (ResultReg).addZImm (16);
+        BuildMI (BB, V8::SRLri, 2, DestReg).addReg (TmpReg).addZImm (16);
       }
       break;
     case cInt:
diff --git a/lib/Target/SparcV8/InstSelectSimple.cpp b/lib/Target/SparcV8/InstSelectSimple.cpp
index 1ba42858d0e..890e55d4d3d 100644
--- a/lib/Target/SparcV8/InstSelectSimple.cpp
+++ b/lib/Target/SparcV8/InstSelectSimple.cpp
@@ -289,8 +289,8 @@ void V8ISel::visitBinaryOperator (BinaryOperator &I) {
         BuildMI (BB, V8::SRAri, 2, DestReg).addReg (TmpReg).addZImm (16);
       } else { // add ushort
         unsigned TmpReg = makeAnotherReg (I.getType ());
-        BuildMI (BB, V8::SLLri, 2, TmpReg).addReg (ResultReg).addZImm (24);
-        BuildMI (BB, V8::SRLri, 2, DestReg).addReg (TmpReg).addZImm (24);
+        BuildMI (BB, V8::SLLri, 2, TmpReg).addReg (ResultReg).addZImm (16);
+        BuildMI (BB, V8::SRLri, 2, DestReg).addReg (TmpReg).addZImm (16);
       }
       break;
     case cInt:
diff --git a/lib/Target/SparcV8/SparcV8ISelSimple.cpp b/lib/Target/SparcV8/SparcV8ISelSimple.cpp
index 1ba42858d0e..890e55d4d3d 100644
--- a/lib/Target/SparcV8/SparcV8ISelSimple.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelSimple.cpp
@@ -289,8 +289,8 @@ void V8ISel::visitBinaryOperator (BinaryOperator &I) {
         BuildMI (BB, V8::SRAri, 2, DestReg).addReg (TmpReg).addZImm (16);
       } else { // add ushort
         unsigned TmpReg = makeAnotherReg (I.getType ());
-        BuildMI (BB, V8::SLLri, 2, TmpReg).addReg (ResultReg).addZImm (24);
-        BuildMI (BB, V8::SRLri, 2, DestReg).addReg (TmpReg).addZImm (24);
+        BuildMI (BB, V8::SLLri, 2, TmpReg).addReg (ResultReg).addZImm (16);
+        BuildMI (BB, V8::SRLri, 2, DestReg).addReg (TmpReg).addZImm (16);
       }
       break;
     case cInt: