From 6d48855a56067b17db1e4e0e2699be5030710b3e Mon Sep 17 00:00:00 2001 From: Sanjiv Gupta Date: Wed, 23 Dec 2009 09:46:01 +0000 Subject: [PATCH] Reverting back 91904. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91993 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PIC16/PIC16ISelDAGToDAG.h | 5 +--- lib/Target/PIC16/PIC16ISelLowering.cpp | 40 ++++++-------------------- lib/Target/PIC16/PIC16ISelLowering.h | 10 +------ test/CodeGen/PIC16/C16-49.ll | 15 ---------- 4 files changed, 10 insertions(+), 60 deletions(-) diff --git a/lib/Target/PIC16/PIC16ISelDAGToDAG.h b/lib/Target/PIC16/PIC16ISelDAGToDAG.h index d9172f2b362..3a2f6b47b37 100644 --- a/lib/Target/PIC16/PIC16ISelDAGToDAG.h +++ b/lib/Target/PIC16/PIC16ISelDAGToDAG.h @@ -36,10 +36,7 @@ class VISIBILITY_HIDDEN PIC16DAGToDAGISel : public SelectionDAGISel { public: explicit PIC16DAGToDAGISel(PIC16TargetMachine &tm) : SelectionDAGISel(tm), - TM(tm), PIC16Lowering(*TM.getTargetLowering()) { - // Keep PIC16 specific DAGISel to use during the lowering - PIC16Lowering.ISel = this; - } + TM(tm), PIC16Lowering(*TM.getTargetLowering()) {} // Pass Name virtual const char *getPassName() const { diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp index 3cd6f9f3111..4d2096edcf1 100644 --- a/lib/Target/PIC16/PIC16ISelLowering.cpp +++ b/lib/Target/PIC16/PIC16ISelLowering.cpp @@ -1482,8 +1482,7 @@ bool PIC16TargetLowering::isDirectLoad(const SDValue Op) { // operand no. of the operand to be converted in 'MemOp'. Remember, PIC16 has // no instruction that can operation on two registers. Most insns take // one register and one memory operand (addwf) / Constant (addlw). -bool PIC16TargetLowering::NeedToConvertToMemOp(SDValue Op, unsigned &MemOp, - SelectionDAG &DAG) { +bool PIC16TargetLowering::NeedToConvertToMemOp(SDValue Op, unsigned &MemOp) { // If one of the operand is a constant, return false. if (Op.getOperand(0).getOpcode() == ISD::Constant || Op.getOperand(1).getOpcode() == ISD::Constant) @@ -1492,33 +1491,11 @@ bool PIC16TargetLowering::NeedToConvertToMemOp(SDValue Op, unsigned &MemOp, // Return false if one of the operands is already a direct // load and that operand has only one use. if (isDirectLoad(Op.getOperand(0))) { - if (Op.getOperand(0).hasOneUse()) { - // Legal and profitable folding check uses the NodeId of DAG nodes. - // This NodeId is assigned by topological order. Therefore first - // assign topological order then perform legal and profitable check. - // Note:- Though this ordering is done before begining with legalization, - // newly added node during legalization process have NodeId=-1 (NewNode) - // therefore before performing any check proper ordering of the node is - // required. - DAG.AssignTopologicalOrder(); - - // Direct load operands are folded in binary operations. But before folding - // verify if this folding is legal. Fold only if it is legal otherwise - // convert this direct load to a separate memory operation. - if(ISel->IsLegalAndProfitableToFold(Op.getOperand(0).getNode(), - Op.getNode(), Op.getNode())) - return false; - else - MemOp = 0; - } + if (Op.getOperand(0).hasOneUse()) + return false; + else + MemOp = 0; } - - // For operations that are non-cummutative there is no need to check - // for right operand because folding right operand may result in - // incorrect operation. - if (! SelectionDAG::isCommutativeBinOp(Op.getOpcode())) - return true; - if (isDirectLoad(Op.getOperand(1))) { if (Op.getOperand(1).hasOneUse()) return false; @@ -1537,7 +1514,7 @@ SDValue PIC16TargetLowering::LowerBinOp(SDValue Op, SelectionDAG &DAG) { assert (Op.getValueType() == MVT::i8 && "illegal Op to lower"); unsigned MemOp = 1; - if (NeedToConvertToMemOp(Op, MemOp, DAG)) { + if (NeedToConvertToMemOp(Op, MemOp)) { // Put one value on stack. SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG, dl); @@ -1556,7 +1533,7 @@ SDValue PIC16TargetLowering::LowerADD(SDValue Op, SelectionDAG &DAG) { assert (Op.getValueType() == MVT::i8 && "illegal add to lower"); DebugLoc dl = Op.getDebugLoc(); unsigned MemOp = 1; - if (NeedToConvertToMemOp(Op, MemOp, DAG)) { + if (NeedToConvertToMemOp(Op, MemOp)) { // Put one value on stack. SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG, dl); @@ -1587,8 +1564,7 @@ SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) { // Nothing to do if the first operand is already a direct load and it has // only one use. - unsigned MemOp = 0; - if (! NeedToConvertToMemOp(Op, MemOp, DAG)) + if (isDirectLoad(Op.getOperand(0)) && Op.getOperand(0).hasOneUse()) return Op; // Put first operand on stack. diff --git a/lib/Target/PIC16/PIC16ISelLowering.h b/lib/Target/PIC16/PIC16ISelLowering.h index 2949465dbcd..286ed2411ef 100644 --- a/lib/Target/PIC16/PIC16ISelLowering.h +++ b/lib/Target/PIC16/PIC16ISelLowering.h @@ -18,7 +18,6 @@ #include "PIC16.h" #include "PIC16Subtarget.h" #include "llvm/CodeGen/SelectionDAG.h" -#include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/Target/TargetLowering.h" #include @@ -217,9 +216,7 @@ namespace llvm { // This function checks if we need to put an operand of an operation on // stack and generate a load or not. - // DAG parameter is required to access DAG information during - // analysis. - bool NeedToConvertToMemOp(SDValue Op, unsigned &MemOp, SelectionDAG &DAG); + bool NeedToConvertToMemOp(SDValue Op, unsigned &MemOp); /// Subtarget - Keep a pointer to the PIC16Subtarget around so that we can /// make the right decision when generating code for different targets. @@ -242,11 +239,6 @@ namespace llvm { // Check if operation has a direct load operand. inline bool isDirectLoad(const SDValue Op); - public: - // Keep a pointer to SelectionDAGISel to access its public - // interface (It is required during legalization) - SelectionDAGISel *ISel; - private: // The frameindexes generated for spill/reload are stack based. // This maps maintain zero based indexes for these FIs. diff --git a/test/CodeGen/PIC16/C16-49.ll b/test/CodeGen/PIC16/C16-49.ll index e59800b9a92..e69de29bb2d 100644 --- a/test/CodeGen/PIC16/C16-49.ll +++ b/test/CodeGen/PIC16/C16-49.ll @@ -1,15 +0,0 @@ -;RUN: llvm-as < %s | llc -march=pic16 - -@aa = global i16 55, align 1 ; [#uses=1] -@bb = global i16 44, align 1 ; [#uses=1] -@PORTD = external global i8 ; [#uses=1] - -define void @foo() nounwind { -entry: - %tmp = volatile load i16* @aa ; [#uses=1] - %tmp1 = volatile load i16* @bb ; [#uses=1] - %sub = sub i16 %tmp, %tmp1 ; [#uses=1] - %conv = trunc i16 %sub to i8 ; [#uses=1] - store i8 %conv, i8* @PORTD - ret void -}