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Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This reduces the complexity of debug info handling down to two representations of values (reg+offset and frame index+offset) rather than three or four. Ideally we could ensure that frame indicies had been eliminated by the time we reached an assembly or dwarf generation, but I haven't spent the time to figure out where the FIs are leaking through into that & whether there's a good place to convert them. Some FI+offset=>reg+offset conversion is done (see PrologEpilogInserter, for example) which is necessary for some SelectionDAG assumptions about registers, I believe, but it might be possible to make this a more thorough conversion & ensure there are no remaining FIs no matter how instruction selection is performed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184066 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -777,7 +777,22 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
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bool DoIncr = true;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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if (!MI->getOperand(i).isFI())
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continue;
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continue;
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// Frame indicies in debug values are encoded in a target independent
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// way with simply the frame index and offset rather than any
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// target-specific addressing mode.
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if (MI->isDebugValue()) {
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assert(i == 0 && "Frame indicies can only appear as the first "
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"operand of a DBG_VALUE machine instruction");
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unsigned Reg;
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MachineOperand &Offset = MI->getOperand(1);
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Offset.setImm(Offset.getImm() +
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TFI->getFrameIndexReference(
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Fn, MI->getOperand(0).getIndex(), Reg));
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MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
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continue;
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}
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// Some instructions (e.g. inline asm instructions) can have
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// multiple frame indices and/or cause eliminateFrameIndex
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