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Rename WrapperPIC. It is now used for both pic and static.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2011-12-09 01:53:17 +00:00
parent 0dca9456c5
commit 6df7e23f0c
5 changed files with 25 additions and 25 deletions
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12
lib/Target/Mips/Mips64InstrInfo.td
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@ -285,12 +285,12 @@ def : Pat<(add CPU64Regs:$hi, (MipsLo tconstpool:$lo)),
def : Pat<(add CPU64Regs:$hi, (MipsLo tglobaltlsaddr:$lo)),
(DADDiu CPU64Regs:$hi, tglobaltlsaddr:$lo)>;
def : WrapperPICPat<tglobaladdr, DADDiu, GP_64>;
def : WrapperPICPat<tconstpool, DADDiu, GP_64>;
def : WrapperPICPat<texternalsym, DADDiu, GP_64>;
def : WrapperPICPat<tblockaddress, DADDiu, GP_64>;
def : WrapperPICPat<tjumptable, DADDiu, GP_64>;
def : WrapperPICPat<tglobaltlsaddr, DADDiu, GP_64>;
def : WrapperPat<tglobaladdr, DADDiu, GP_64>;
def : WrapperPat<tconstpool, DADDiu, GP_64>;
def : WrapperPat<texternalsym, DADDiu, GP_64>;
def : WrapperPat<tblockaddress, DADDiu, GP_64>;
def : WrapperPat<tjumptable, DADDiu, GP_64>;
def : WrapperPat<tglobaltlsaddr, DADDiu, GP_64>;
defm : BrcondPats<CPU64Regs, BEQ64, BNE64, SLT64, SLTu64, SLTi64, SLTiu64,
ZERO_64>;

2
lib/Target/Mips/MipsISelDAGToDAG.cpp
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@ -121,7 +121,7 @@ SelectAddr(SDValue Addr, SDValue &Base, SDValue &Offset) {
}
// on PIC code Load GA
if (Addr.getOpcode() == MipsISD::WrapperPIC) {
if (Addr.getOpcode() == MipsISD::Wrapper) {
Base = CurDAG->getRegister(GPReg, ValTy);
Offset = Addr.getOperand(0);
return true;

16
lib/Target/Mips/MipsISelLowering.cpp
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@ -69,7 +69,7 @@ const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
case MipsISD::DivRemU: return "MipsISD::DivRemU";
case MipsISD::BuildPairF64: return "MipsISD::BuildPairF64";
case MipsISD::ExtractElementF64: return "MipsISD::ExtractElementF64";
case MipsISD::WrapperPIC: return "MipsISD::WrapperPIC";
case MipsISD::Wrapper: return "MipsISD::Wrapper";
case MipsISD::DynAlloc: return "MipsISD::DynAlloc";
case MipsISD::Sync: return "MipsISD::Sync";
case MipsISD::Ext: return "MipsISD::Ext";
@ -1488,7 +1488,7 @@ SDValue MipsTargetLowering::LowerGlobalAddress(SDValue Op,
(HasGotOfst ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT_DISP) :
(HasGotOfst ? MipsII::MO_GOT : MipsII::MO_GOT16);
SDValue GA = DAG.getTargetGlobalAddress(GV, dl, ValTy, 0, GotFlag);
GA = DAG.getNode(MipsISD::WrapperPIC, dl, ValTy, GA);
GA = DAG.getNode(MipsISD::Wrapper, dl, ValTy, GA);
SDValue ResNode = DAG.getLoad(ValTy, dl,
DAG.getEntryNode(), GA, MachinePointerInfo(),
false, false, false, 0);
@ -1524,7 +1524,7 @@ SDValue MipsTargetLowering::LowerBlockAddress(SDValue Op,
unsigned GOTFlag = IsN64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT;
unsigned OFSTFlag = IsN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
SDValue BAGOTOffset = DAG.getBlockAddress(BA, ValTy, true, GOTFlag);
BAGOTOffset = DAG.getNode(MipsISD::WrapperPIC, dl, ValTy, BAGOTOffset);
BAGOTOffset = DAG.getNode(MipsISD::Wrapper, dl, ValTy, BAGOTOffset);
SDValue BALOOffset = DAG.getBlockAddress(BA, ValTy, true, OFSTFlag);
SDValue Load = DAG.getLoad(ValTy, dl,
DAG.getEntryNode(), BAGOTOffset,
@ -1549,7 +1549,7 @@ LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const
// General Dynamic TLS Model
SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT,
0, MipsII::MO_TLSGD);
SDValue Argument = DAG.getNode(MipsISD::WrapperPIC, dl, PtrVT, TGA);
SDValue Argument = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, TGA);
unsigned PtrSize = PtrVT.getSizeInBits();
IntegerType *PtrTy = Type::getIntNTy(*DAG.getContext(), PtrSize);
@ -1579,7 +1579,7 @@ LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const
// Initial Exec TLS Model
SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
MipsII::MO_GOTTPREL);
TGA = DAG.getNode(MipsISD::WrapperPIC, dl, PtrVT, TGA);
TGA = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, TGA);
Offset = DAG.getLoad(PtrVT, dl,
DAG.getEntryNode(), TGA, MachinePointerInfo(),
false, false, false, 0);
@ -1616,7 +1616,7 @@ LowerJumpTable(SDValue Op, SelectionDAG &DAG) const
unsigned GOTFlag = IsN64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT;
unsigned OfstFlag = IsN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, GOTFlag);
JTI = DAG.getNode(MipsISD::WrapperPIC, dl, PtrVT, JTI);
JTI = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, JTI);
HiPart = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), JTI,
MachinePointerInfo(), false, false, false, 0);
JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, OfstFlag);
@ -1659,7 +1659,7 @@ LowerConstantPool(SDValue Op, SelectionDAG &DAG) const
unsigned OFSTFlag = IsN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
SDValue CP = DAG.getTargetConstantPool(C, ValTy, N->getAlignment(),
N->getOffset(), GOTFlag);
CP = DAG.getNode(MipsISD::WrapperPIC, dl, ValTy, CP);
CP = DAG.getNode(MipsISD::Wrapper, dl, ValTy, CP);
SDValue Load = DAG.getLoad(ValTy, dl, DAG.getEntryNode(),
CP, MachinePointerInfo::getConstantPool(),
false, false, false, 0);
@ -2375,7 +2375,7 @@ MipsTargetLowering::LowerCall(SDValue InChain, SDValue Callee,
if (IsPICCall) {
if (GlobalOrExternal) {
// Load callee address
Callee = DAG.getNode(MipsISD::WrapperPIC, dl, getPointerTy(), Callee);
Callee = DAG.getNode(MipsISD::Wrapper, dl, getPointerTy(), Callee);
SDValue LoadValue = DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(),
Callee, MachinePointerInfo::getGOT(),
false, false, false, 0);

2
lib/Target/Mips/MipsISelLowering.h
View File

@ -72,7 +72,7 @@ namespace llvm {
BuildPairF64,
ExtractElementF64,
WrapperPIC,
Wrapper,
DynAlloc,

18
lib/Target/Mips/MipsInstrInfo.td
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@ -107,7 +107,7 @@ def MipsDivRemU : SDNode<"MipsISD::DivRemU", SDT_MipsDivRem,
// movn %got(d)($gp), %got(c)($gp), $4
// This instruction is illegal since movn can take only register operands.
def MipsWrapperPIC : SDNode<"MipsISD::WrapperPIC", SDTIntUnaryOp>;
def MipsWrapper : SDNode<"MipsISD::Wrapper", SDTIntUnaryOp>;
// Pointer to dynamically allocated stack area.
def MipsDynAlloc : SDNode<"MipsISD::DynAlloc", SDT_MipsDynAlloc,
@ -968,16 +968,16 @@ def : Pat<(add CPURegs:$gp, (MipsGPRel tconstpool:$in)),
(ADDiu CPURegs:$gp, tconstpool:$in)>;
// wrapper_pic
class WrapperPICPat<SDNode node, Instruction ADDiuOp, Register GPReg>:
Pat<(MipsWrapperPIC node:$in),
class WrapperPat<SDNode node, Instruction ADDiuOp, Register GPReg>:
Pat<(MipsWrapper node:$in),
(ADDiuOp GPReg, node:$in)>;
def : WrapperPICPat<tglobaladdr, ADDiu, GP>;
def : WrapperPICPat<tconstpool, ADDiu, GP>;
def : WrapperPICPat<texternalsym, ADDiu, GP>;
def : WrapperPICPat<tblockaddress, ADDiu, GP>;
def : WrapperPICPat<tjumptable, ADDiu, GP>;
def : WrapperPICPat<tglobaltlsaddr, ADDiu, GP>;
def : WrapperPat<tglobaladdr, ADDiu, GP>;
def : WrapperPat<tconstpool, ADDiu, GP>;
def : WrapperPat<texternalsym, ADDiu, GP>;
def : WrapperPat<tblockaddress, ADDiu, GP>;
def : WrapperPat<tjumptable, ADDiu, GP>;
def : WrapperPat<tglobaltlsaddr, ADDiu, GP>;
// Mips does not have "not", so we expand our way
def : Pat<(not CPURegs:$in),