diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index dd61c0ab057..acce1d25d5c 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -191,16 +191,10 @@ public: /// \brief Get a \c TargetIRAnalysis appropriate for the target. /// /// This is used to construct the new pass manager's target IR analysis pass, - /// set up appropriately for this target machine. + /// set up appropriately for this target machine. Even the old pass manager + /// uses this to answer queries about the IR. virtual TargetIRAnalysis getTargetIRAnalysis(); - /// \brief Get a TTI implementation for the target. - /// - /// Targets should override this method to provide target-accurate - /// information to the mid-level optimizer. If left with the baseline only - /// a very conservative set of heuristics will be used. - virtual TargetTransformInfo getTTI(); - /// CodeGenFileType - These enums are meant to be passed into /// addPassesToEmitFile to indicate what type of file to emit, and returned by /// it to indicate what type of file could actually be made. @@ -252,12 +246,11 @@ protected: // Can only create subclasses. void initAsmInfo(); public: - /// \brief Get a TTI implementation for the target. + /// \brief Get a TargetIRAnalysis implementation for the target. /// - /// This uses the common code generator to produce a TTI implementation. - /// Targets may override it to provide more customized TTI implementation - /// instead. - TargetTransformInfo getTTI() override; + /// This analysis will produce a TTI result which uses the common code + /// generator to answer queries about the IR. + TargetIRAnalysis getTargetIRAnalysis() override; /// createPassConfig - Create a pass configuration object to be used by /// addPassToEmitX methods for generating a pipeline of CodeGen passes. diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index fd242b36045..d3d8a508292 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -78,8 +78,9 @@ LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple, CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL); } -TargetTransformInfo LLVMTargetMachine::getTTI() { - return TargetTransformInfo(BasicTTIImpl(this)); +TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis( + [this](Function &) { return TargetTransformInfo(BasicTTIImpl(this)); }); } /// addPassesToX helper drives creation and initialization of TargetPassConfig. diff --git a/lib/Target/AArch64/AArch64TargetMachine.cpp b/lib/Target/AArch64/AArch64TargetMachine.cpp index bbd85ea723c..c67359761bf 100644 --- a/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -196,8 +196,10 @@ public: }; } // namespace -TargetTransformInfo AArch64TargetMachine::getTTI() { - return TargetTransformInfo(AArch64TTIImpl(this)); +TargetIRAnalysis AArch64TargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis([this](Function &F) { + return TargetTransformInfo(AArch64TTIImpl(this, F)); + }); } TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) { diff --git a/lib/Target/AArch64/AArch64TargetMachine.h b/lib/Target/AArch64/AArch64TargetMachine.h index 6ed3bb4a35d..7143adf6c09 100644 --- a/lib/Target/AArch64/AArch64TargetMachine.h +++ b/lib/Target/AArch64/AArch64TargetMachine.h @@ -45,8 +45,8 @@ public: // Pass Pipeline Configuration TargetPassConfig *createPassConfig(PassManagerBase &PM) override; - /// \brief Register AArch64 analysis passes with a pass manager. - TargetTransformInfo getTTI() override; + /// \brief Get the TargetIRAnalysis for this target. + TargetIRAnalysis getTargetIRAnalysis() override; TargetLoweringObjectFile* getObjFileLowering() const override { return TLOF.get(); diff --git a/lib/Target/AArch64/AArch64TargetTransformInfo.h b/lib/Target/AArch64/AArch64TargetTransformInfo.h index 5d4b9a39f67..8a98779d95b 100644 --- a/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -44,8 +44,8 @@ class AArch64TTIImpl : public BasicTTIImplBase { }; public: - explicit AArch64TTIImpl(const AArch64TargetMachine *TM) - : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {} + explicit AArch64TTIImpl(const AArch64TargetMachine *TM, Function &F) + : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {} // Provide value semantics. MSVC requires that we spell all of these out. AArch64TTIImpl(const AArch64TTIImpl &Arg) diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 008b4773c6d..6fc761b74b8 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -216,8 +216,9 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const { return I.get(); } -TargetTransformInfo ARMBaseTargetMachine::getTTI() { - return TargetTransformInfo(ARMTTIImpl(this)); +TargetIRAnalysis ARMBaseTargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis( + [this](Function &F) { return TargetTransformInfo(ARMTTIImpl(this, F)); }); } diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index 0a15d1765c2..2e7e8f22fc8 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -49,8 +49,8 @@ public: const ARMSubtarget *getSubtargetImpl(const Function &F) const override; const DataLayout *getDataLayout() const override { return &DL; } - /// \brief Register ARM analysis passes with a pass manager. - TargetTransformInfo getTTI() override; + /// \brief Get the TargetIRAnalysis for this target. + TargetIRAnalysis getTargetIRAnalysis() override; // Pass Pipeline Configuration TargetPassConfig *createPassConfig(PassManagerBase &PM) override; diff --git a/lib/Target/ARM/ARMTargetTransformInfo.h b/lib/Target/ARM/ARMTargetTransformInfo.h index f5cfc907fe6..8dcba8dca85 100644 --- a/lib/Target/ARM/ARMTargetTransformInfo.h +++ b/lib/Target/ARM/ARMTargetTransformInfo.h @@ -37,8 +37,8 @@ class ARMTTIImpl : public BasicTTIImplBase { unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract); public: - explicit ARMTTIImpl(const ARMBaseTargetMachine *TM) - : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {} + explicit ARMTTIImpl(const ARMBaseTargetMachine *TM, Function &F) + : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {} // Provide value semantics. MSVC requires that we spell all of these out. ARMTTIImpl(const ARMTTIImpl &Arg) diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp index 54b57dd76e3..0fd3a14b7cf 100644 --- a/lib/Target/Mips/MipsTargetMachine.cpp +++ b/lib/Target/Mips/MipsTargetMachine.cpp @@ -238,18 +238,17 @@ void MipsPassConfig::addPreRegAlloc() { addPass(createMipsOptimizePICCallPass(getMipsTargetMachine())); } -TargetTransformInfo MipsTargetMachine::getTTI() { - if (Subtarget->allowMixed16_32()) { - DEBUG(errs() << "No Target Transform Info Pass Added\n"); - //FIXME: The Basic Target Transform Info - // pass needs to become a function pass instead of - // being an immutable pass and then this method as it exists now - // would be unnecessary. - return TargetTransformInfo(getDataLayout()); - } +TargetIRAnalysis MipsTargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis([this](Function &F) { + if (Subtarget->allowMixed16_32()) { + DEBUG(errs() << "No Target Transform Info Pass Added\n"); + // FIXME: This is no longer necessary as the TTI returned is per-function. + return TargetTransformInfo(getDataLayout()); + } - DEBUG(errs() << "Target Transform Info Pass Added\n"); - return LLVMTargetMachine::getTTI(); + DEBUG(errs() << "Target Transform Info Pass Added\n"); + return TargetTransformInfo(BasicTTIImpl(this)); + }); } // Implemented by targets that want to run passes immediately before diff --git a/lib/Target/Mips/MipsTargetMachine.h b/lib/Target/Mips/MipsTargetMachine.h index e364dc2e41a..07dfdc3e69e 100644 --- a/lib/Target/Mips/MipsTargetMachine.h +++ b/lib/Target/Mips/MipsTargetMachine.h @@ -15,6 +15,7 @@ #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H #include "MipsSubtarget.h" +#include "llvm/CodeGen/BasicTTIImpl.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/Target/TargetFrameLowering.h" @@ -44,7 +45,7 @@ public: CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle); ~MipsTargetMachine() override; - TargetTransformInfo getTTI() override; + TargetIRAnalysis getTargetIRAnalysis() override; const DataLayout *getDataLayout() const override { return &DL; } const MipsSubtarget *getSubtargetImpl() const override { diff --git a/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/lib/Target/NVPTX/NVPTXTargetMachine.cpp index aacf7dcdcf9..371d34d1fbd 100644 --- a/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -137,8 +137,9 @@ TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) { return PassConfig; } -TargetTransformInfo NVPTXTargetMachine::getTTI() { - return TargetTransformInfo(NVPTXTTIImpl(this)); +TargetIRAnalysis NVPTXTargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis( + [this](Function &) { return TargetTransformInfo(NVPTXTTIImpl(this)); }); } void NVPTXPassConfig::addIRPasses() { diff --git a/lib/Target/NVPTX/NVPTXTargetMachine.h b/lib/Target/NVPTX/NVPTXTargetMachine.h index 3b9511210c7..42e7a9257cb 100644 --- a/lib/Target/NVPTX/NVPTXTargetMachine.h +++ b/lib/Target/NVPTX/NVPTXTargetMachine.h @@ -56,7 +56,7 @@ public: return TLOF.get(); } - TargetTransformInfo getTTI() override; + TargetIRAnalysis getTargetIRAnalysis() override; }; // NVPTXTargetMachine. diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index ba061cfd6ef..08ecc6fb9b5 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -275,6 +275,7 @@ void PPCPassConfig::addPreEmitPass() { addPass(createPPCBranchSelectionPass(), false); } -TargetTransformInfo PPCTargetMachine::getTTI() { - return TargetTransformInfo(PPCTTIImpl(this)); +TargetIRAnalysis PPCTargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis( + [this](Function &F) { return TargetTransformInfo(PPCTTIImpl(this, F)); }); } diff --git a/lib/Target/PowerPC/PPCTargetMachine.h b/lib/Target/PowerPC/PPCTargetMachine.h index 7786a14f3a9..4499219b833 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.h +++ b/lib/Target/PowerPC/PPCTargetMachine.h @@ -45,7 +45,7 @@ public: // Pass Pipeline Configuration TargetPassConfig *createPassConfig(PassManagerBase &PM) override; - TargetTransformInfo getTTI() override; + TargetIRAnalysis getTargetIRAnalysis() override; TargetLoweringObjectFile *getObjFileLowering() const override { return TLOF.get(); diff --git a/lib/Target/PowerPC/PPCTargetTransformInfo.h b/lib/Target/PowerPC/PPCTargetTransformInfo.h index cc780b6864b..7238460467d 100644 --- a/lib/Target/PowerPC/PPCTargetTransformInfo.h +++ b/lib/Target/PowerPC/PPCTargetTransformInfo.h @@ -33,8 +33,8 @@ class PPCTTIImpl : public BasicTTIImplBase { const PPCTargetLowering *TLI; public: - explicit PPCTTIImpl(const PPCTargetMachine *TM) - : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {} + explicit PPCTTIImpl(const PPCTargetMachine *TM, Function &F) + : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {} // Provide value semantics. MSVC requires that we spell all of these out. PPCTTIImpl(const PPCTTIImpl &Arg) diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp index b43a63e5805..14c8a841f19 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -120,8 +120,9 @@ TargetPassConfig *AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) { // AMDGPU Pass Setup //===----------------------------------------------------------------------===// -TargetTransformInfo AMDGPUTargetMachine::getTTI() { - return TargetTransformInfo(AMDGPUTTIImpl(this)); +TargetIRAnalysis AMDGPUTargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis( + [this](Function &F) { return TargetTransformInfo(AMDGPUTTIImpl(this)); }); } void AMDGPUPassConfig::addIRPasses() { diff --git a/lib/Target/R600/AMDGPUTargetMachine.h b/lib/Target/R600/AMDGPUTargetMachine.h index 17cb28cd63e..2f3cc4a0136 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.h +++ b/lib/Target/R600/AMDGPUTargetMachine.h @@ -55,7 +55,7 @@ public: } TargetPassConfig *createPassConfig(PassManagerBase &PM) override; - TargetTransformInfo getTTI() override; + TargetIRAnalysis getTargetIRAnalysis() override; TargetLoweringObjectFile *getObjFileLowering() const override { return TLOF; diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index 1e5bfb24729..ef0341dc917 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -173,14 +173,8 @@ void TargetMachine::setDataSections(bool V) { } TargetIRAnalysis TargetMachine::getTargetIRAnalysis() { - // While targets are free to just override getTTI and rely on this analysis, - // it would be more efficient to override and provide an analysis that could - // directly construct that target's TTI without the virtual call. - return TargetIRAnalysis([this](Function &) { return getTTI(); }); -} - -TargetTransformInfo TargetMachine::getTTI() { - return TargetTransformInfo(getDataLayout()); + return TargetIRAnalysis( + [this](Function &) { return TargetTransformInfo(getDataLayout()); }); } static bool canUsePrivateLabel(const MCAsmInfo &AsmInfo, diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 2376123de7c..78fe430c7f6 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -165,8 +165,9 @@ UseVZeroUpper("x86-use-vzeroupper", cl::Hidden, // X86 TTI query. //===----------------------------------------------------------------------===// -TargetTransformInfo X86TargetMachine::getTTI() { - return TargetTransformInfo(X86TTIImpl(this)); +TargetIRAnalysis X86TargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis( + [this](Function &F) { return TargetTransformInfo(X86TTIImpl(this, F)); }); } diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index 83f71a7bcc2..283858d986b 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -39,7 +39,7 @@ public: const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; } const X86Subtarget *getSubtargetImpl(const Function &F) const override; - TargetTransformInfo getTTI() override; + TargetIRAnalysis getTargetIRAnalysis() override; // Set up the pass pipeline. TargetPassConfig *createPassConfig(PassManagerBase &PM) override; diff --git a/lib/Target/X86/X86TargetTransformInfo.h b/lib/Target/X86/X86TargetTransformInfo.h index c77452b0a56..3c1f5c0167a 100644 --- a/lib/Target/X86/X86TargetTransformInfo.h +++ b/lib/Target/X86/X86TargetTransformInfo.h @@ -35,8 +35,8 @@ class X86TTIImpl : public BasicTTIImplBase { unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract); public: - explicit X86TTIImpl(const X86TargetMachine *TM) - : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {} + explicit X86TTIImpl(const X86TargetMachine *TM, Function &F) + : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {} // Provide value semantics. MSVC requires that we spell all of these out. X86TTIImpl(const X86TTIImpl &Arg) diff --git a/lib/Target/XCore/XCoreTargetMachine.cpp b/lib/Target/XCore/XCoreTargetMachine.cpp index d6832a372d1..c40d83a97cb 100644 --- a/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/lib/Target/XCore/XCoreTargetMachine.cpp @@ -83,6 +83,7 @@ extern "C" void LLVMInitializeXCoreTarget() { RegisterTargetMachine X(TheXCoreTarget); } -TargetTransformInfo XCoreTargetMachine::getTTI() { - return TargetTransformInfo(XCoreTTIImpl(this)); +TargetIRAnalysis XCoreTargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis( + [this](Function &) { return TargetTransformInfo(XCoreTTIImpl(this)); }); } diff --git a/lib/Target/XCore/XCoreTargetMachine.h b/lib/Target/XCore/XCoreTargetMachine.h index ea9c36b02d5..c5df07c1d28 100644 --- a/lib/Target/XCore/XCoreTargetMachine.h +++ b/lib/Target/XCore/XCoreTargetMachine.h @@ -36,7 +36,7 @@ public: // Pass Pipeline Configuration TargetPassConfig *createPassConfig(PassManagerBase &PM) override; - TargetTransformInfo getTTI() override; + TargetIRAnalysis getTargetIRAnalysis() override; TargetLoweringObjectFile *getObjFileLowering() const override { return TLOF.get(); }