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R600/SI: Remove explicit m0 operand from DS instructions
Instead add m0 as an implicit operand. This helps avoid spills of the m0 register in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237141 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -65,8 +65,8 @@ define void @simple_read2st64_f32_max_offset(float addrspace(1)* %out, float add
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; SI-LABEL: @simple_read2st64_f32_over_max_offset
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; SI-NOT: ds_read2st64_b32
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; SI: v_add_i32_e32 [[BIGADD:v[0-9]+]], 0x10000, {{v[0-9]+}}
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; SI: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:256
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; SI: v_add_i32_e32 [[BIGADD:v[0-9]+]], 0x10000, {{v[0-9]+}}
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; SI: ds_read_b32 {{v[0-9]+}}, [[BIGADD]]
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; SI: s_endpgm
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define void @simple_read2st64_f32_over_max_offset(float addrspace(1)* %out, float addrspace(3)* %lds) #0 {
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@@ -69,8 +69,8 @@ define void @load_shl_base_lds_max_offset(i8 addrspace(1)* %out, i8 addrspace(3)
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; pointer can be used with an offset into the second one.
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; SI-LABEL: {{^}}load_shl_base_lds_2:
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; SI: v_lshlrev_b32_e32 [[PTR:v[0-9]+]], 2, {{v[0-9]+}}
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; SI: s_mov_b32 m0, -1
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; SI-NEXT: v_lshlrev_b32_e32 [[PTR:v[0-9]+]], 2, {{v[0-9]+}}
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; SI-NEXT: ds_read2st64_b32 {{v\[[0-9]+:[0-9]+\]}}, [[PTR]] offset0:1 offset1:9
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; SI: s_endpgm
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define void @load_shl_base_lds_2(float addrspace(1)* %out) #0 {
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