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cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105322 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -116,34 +116,6 @@ getCalleeSavedRegs(const MachineFunction *MF) const
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return BitMode32CalleeSavedRegs;
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}
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/// Mips Callee Saved Register Classes
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const TargetRegisterClass* const*
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MipsRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const
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{
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static const TargetRegisterClass * const SingleFloatOnlyCalleeSavedRC[] = {
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&Mips::CPURegsRegClass, &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
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&Mips::CPURegsRegClass, &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
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&Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
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&Mips::FGR32RegClass, &Mips::FGR32RegClass, &Mips::FGR32RegClass,
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&Mips::FGR32RegClass, &Mips::FGR32RegClass, &Mips::FGR32RegClass,
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&Mips::FGR32RegClass, &Mips::FGR32RegClass, &Mips::FGR32RegClass,
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&Mips::FGR32RegClass, &Mips::FGR32RegClass, 0
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};
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static const TargetRegisterClass * const BitMode32CalleeSavedRC[] = {
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&Mips::CPURegsRegClass, &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
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&Mips::CPURegsRegClass, &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
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&Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
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&Mips::FGR32RegClass, &Mips::FGR32RegClass, &Mips::FGR32RegClass,
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&Mips::FGR32RegClass, &Mips::FGR32RegClass, &Mips::FGR32RegClass, 0
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};
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if (Subtarget.isSingleFloat())
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return SingleFloatOnlyCalleeSavedRC;
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else
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return BitMode32CalleeSavedRC;
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}
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BitVector MipsRegisterInfo::
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getReservedRegs(const MachineFunction &MF) const
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{
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