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Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding operands.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40514 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Christopher Lamb
2007-07-26 07:00:46 +00:00
parent 8245510ae0
commit 6f95014158
3 changed files with 1 additions and 16 deletions
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13
include/llvm/CodeGen/MachineInstr.h
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@@ -76,10 +76,6 @@ private:
/// offset - Offset to address of global or external, only valid for /// offset - Offset to address of global or external, only valid for
/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
int offset; int offset;
/// subReg - SubRegister number, only valid for MO_Register. A value of 0
/// indicates the MO_Register has no subReg.
unsigned subReg;
} auxInfo; } auxInfo;
MachineOperand() {} MachineOperand() {}
@@ -178,10 +174,6 @@ public:
"Wrong MachineOperand accessor"); "Wrong MachineOperand accessor");
return auxInfo.offset; return auxInfo.offset;
} }
unsigned getSubReg() const {
assert(isRegister() && "Wrong MachineOperand accessor");
return auxInfo.subReg;
}
const char *getSymbolName() const { const char *getSymbolName() const {
assert(isExternalSymbol() && "Wrong MachineOperand accessor"); assert(isExternalSymbol() && "Wrong MachineOperand accessor");
return contents.SymbolName; return contents.SymbolName;
@@ -267,10 +259,6 @@ public:
"Wrong MachineOperand accessor"); "Wrong MachineOperand accessor");
auxInfo.offset = Offset; auxInfo.offset = Offset;
} }
void setSubReg(unsigned subReg) {
assert(isRegister() && "Wrong MachineOperand accessor");
auxInfo.subReg = subReg;
}
void setConstantPoolIndex(unsigned Idx) { void setConstantPoolIndex(unsigned Idx) {
assert(isConstantPoolIndex() && "Wrong MachineOperand accessor"); assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
contents.immedVal = Idx; contents.immedVal = Idx;
@@ -459,7 +447,6 @@ public:
Op.IsKill = IsKill; Op.IsKill = IsKill;
Op.IsDead = IsDead; Op.IsDead = IsDead;
Op.contents.RegNo = Reg; Op.contents.RegNo = Reg;
Op.auxInfo.subReg = 0;
} }
/// addImmOperand - Add a zero extended constant argument to the /// addImmOperand - Add a zero extended constant argument to the

2
include/llvm/CodeGen/MachineInstrBuilder.h
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@@ -37,7 +37,7 @@ public:
/// addReg - Add a new virtual register operand... /// addReg - Add a new virtual register operand...
/// ///
const const
MachineInstrBuilder &addReg(int RegNo, bool isDef = false, bool isImp = false, MachineInstrBuilder &addReg(unsigned RegNo, bool isDef = false, bool isImp = false,
bool isKill = false, bool isDead = false) const { bool isKill = false, bool isDead = false) const {
MI->addRegOperand(RegNo, isDef, isImp, isKill, isDead); MI->addRegOperand(RegNo, isDef, isImp, isKill, isDead);
return *this; return *this;

2
lib/CodeGen/MachineInstr.cpp
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@@ -39,7 +39,6 @@ void MachineInstr::addImplicitDefUseOperands() {
Op.IsKill = false; Op.IsKill = false;
Op.IsDead = false; Op.IsDead = false;
Op.contents.RegNo = *ImpDefs; Op.contents.RegNo = *ImpDefs;
Op.auxInfo.subReg = 0;
Operands.push_back(Op); Operands.push_back(Op);
} }
if (TID->ImplicitUses) if (TID->ImplicitUses)
@@ -51,7 +50,6 @@ void MachineInstr::addImplicitDefUseOperands() {
Op.IsKill = false; Op.IsKill = false;
Op.IsDead = false; Op.IsDead = false;
Op.contents.RegNo = *ImpUses; Op.contents.RegNo = *ImpUses;
Op.auxInfo.subReg = 0;
Operands.push_back(Op); Operands.push_back(Op);
} }
} }