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Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64
This commit adds the pre-UAL aliases of fconsts and fconstd for vmov.f32 and vmov.f64. They use an InstAlias rather than a MnemonicAlias to properly support the predicate operand. We need to support encoded 8-bit constants in order to implement the pre-UAL fconsts/fconstd aliases for vmov.f32/vmov.f64, so this commit also fixes parsing of encoded floating point constants used in vmov.f32/vmov.f64 instructions. Now we can support assembly code like this: fconsts s0, #0x70 which is equivalent to vmov.f32 s0, #1.0. Most of the code was already in place to support this feature. Previously the code was trying to accept encoded 8-bit float constants for the vmov.f32/vmov.f64 instructions. It looks like the support for parsing encoded floats was lost in a refactoring in commit r148556 and we did not have any tests in place to catch it. The change in this commit is to keep the parsed value as a 32-bit float instead of a 64-bit double because that is what the isFPImm() function expects to find. There is no loss of precision by using a 32-bit float here because we are still limited to an 8-bit encoded value in the end. Additionally, we explicitly reject encoded 8-bit floats for vmovf.32/64. This is the same as the current behavior, but we now do it explicitly rather than accidently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198697 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1762,3 +1762,14 @@ def : VFP2InstAlias<"vmov${p}.f64 $Dn, $Rt, $Rt2",
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// VMOVD does.
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def : VFP2InstAlias<"vmov${p} $Sd, $Sm",
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(VMOVS SPR:$Sd, SPR:$Sm, pred:$p)>;
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// FCONSTD/FCONSTS alias for vmov.f64/vmov.f32
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// These aliases provide added functionality over vmov.f instructions by
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// allowing users to write assembly containing encoded floating point constants
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// (e.g. #0x70 vs #1.0). Without these alises there is no way for the
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// assembler to accept encoded fp constants (but the equivalent fp-literal is
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// accepted directly by vmovf).
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def : VFP3InstAlias<"fconstd${p} $Dd, $val",
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(FCONSTD DPR:$Dd, vfp_f64imm:$val, pred:$p)>;
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def : VFP3InstAlias<"fconsts${p} $Sd, $val",
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(FCONSTS SPR:$Sd, vfp_f32imm:$val, pred:$p)>;
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@ -4620,8 +4620,12 @@ parseFPImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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// for these:
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// vmov.i{8|16|32|64} <dreg|qreg>, #imm
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ARMOperand *TyOp = static_cast<ARMOperand*>(Operands[2]);
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if (!TyOp->isToken() || (TyOp->getToken() != ".f32" &&
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TyOp->getToken() != ".f64"))
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bool isVmovf = TyOp->isToken() && (TyOp->getToken() == ".f32" ||
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TyOp->getToken() == ".f64");
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ARMOperand *Mnemonic = static_cast<ARMOperand*>(Operands[0]);
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bool isFconst = Mnemonic->isToken() && (Mnemonic->getToken() == "fconstd" ||
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Mnemonic->getToken() == "fconsts");
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if (!(isVmovf || isFconst))
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return MatchOperand_NoMatch;
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Parser.Lex(); // Eat '#' or '$'.
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@ -4634,7 +4638,7 @@ parseFPImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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}
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const AsmToken &Tok = Parser.getTok();
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SMLoc Loc = Tok.getLoc();
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if (Tok.is(AsmToken::Real)) {
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if (Tok.is(AsmToken::Real) && isVmovf) {
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APFloat RealVal(APFloat::IEEEsingle, Tok.getString());
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uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue();
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// If we had a '-' in front, toggle the sign bit.
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@ -4647,15 +4651,16 @@ parseFPImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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}
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// Also handle plain integers. Instructions which allow floating point
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// immediates also allow a raw encoded 8-bit value.
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if (Tok.is(AsmToken::Integer)) {
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if (Tok.is(AsmToken::Integer) && isFconst) {
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int64_t Val = Tok.getIntVal();
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Parser.Lex(); // Eat the token.
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if (Val > 255 || Val < 0) {
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Error(Loc, "encoded floating point value out of range");
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return MatchOperand_ParseFail;
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}
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double RealVal = ARM_AM::getFPImmFloat(Val);
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Val = APFloat(APFloat::IEEEdouble, RealVal).bitcastToAPInt().getZExtValue();
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float RealVal = ARM_AM::getFPImmFloat(Val);
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Val = APFloat(RealVal).bitcastToAPInt().getZExtValue();
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Operands.push_back(ARMOperand::CreateImm(
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MCConstantExpr::Create(Val, getContext()), S,
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Parser.getTok().getLoc()));
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@ -4910,7 +4915,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
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Mnemonic == "fmrs" || Mnemonic == "fsqrts" || Mnemonic == "fsubs" ||
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Mnemonic == "fsts" || Mnemonic == "fcpys" || Mnemonic == "fdivs" ||
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Mnemonic == "fmuls" || Mnemonic == "fcmps" || Mnemonic == "fcmpzs" ||
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Mnemonic == "vfms" || Mnemonic == "vfnms" ||
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Mnemonic == "vfms" || Mnemonic == "vfnms" || Mnemonic == "fconsts" ||
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(Mnemonic == "movs" && isThumb()))) {
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Mnemonic = Mnemonic.slice(0, Mnemonic.size() - 1);
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CarrySetting = true;
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22
test/MC/ARM/fconst.s
Normal file
22
test/MC/ARM/fconst.s
Normal file
@ -0,0 +1,22 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
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@ fconstd/fconsts aliases
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fconsts s4, #0x0
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fconsts s4, #0x70
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fconstd d3, #0x0
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fconstd d3, #0x70
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fconstsne s5, #0x1
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fconstsgt s5, #0x20
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fconstdlt d2, #0x3
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fconstdge d2, #0x40
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@ CHECK: vmov.f32 s4, #2.000000e+00 @ encoding: [0x00,0x2a,0xb0,0xee]
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@ CHECK: vmov.f32 s4, #1.000000e+00 @ encoding: [0x00,0x2a,0xb7,0xee]
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@ CHECK: vmov.f64 d3, #2.000000e+00 @ encoding: [0x00,0x3b,0xb0,0xee]
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@ CHECK: vmov.f64 d3, #1.000000e+00 @ encoding: [0x00,0x3b,0xb7,0xee]
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@ CHECK: vmovne.f32 s5, #2.125000e+00 @ encoding: [0x01,0x2a,0xf0,0x1e]
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@ CHECK: vmovgt.f32 s5, #8.000000e+00 @ encoding: [0x00,0x2a,0xf2,0xce]
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@ CHECK: vmovlt.f64 d2, #2.375000e+00 @ encoding: [0x03,0x2b,0xb0,0xbe]
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@ CHECK: vmovge.f64 d2, #1.250000e-01 @ encoding: [0x00,0x2b,0xb4,0xae]
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test/MC/ARM/fp-const-errors.s
Normal file
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test/MC/ARM/fp-const-errors.s
Normal file
@ -0,0 +1,22 @@
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@ RUN: not llvm-mc -mcpu=cortex-a8 -triple armv7-none-linux-gnueabi < %s 2>&1 | FileCheck %s
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@ Test for floating point constants that are out of the 8-bit encoded value range
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vmov.f32 s2, #32.0
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@ CHECK: error: invalid operand for instruction
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vmov.f64 d2, #32.0
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@ CHECK: error: invalid operand for instruction
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@ Test that vmov.f instructions do not accept an 8-bit encoded float as an operand
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vmov.f32 s1, #0x70
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@ CHECK: error: invalid floating point immediate
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vmov.f64 d2, #0x70
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@ CHECK: error: invalid floating point immediate
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@ Test that fconst instructions do not accept a float constant as an operand
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fconsts s1, #1.0
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@ CHECK: error: invalid floating point immediate
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fconstd d2, #1.0
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@ CHECK: error: invalid floating point immediate
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@ -395,3 +395,46 @@
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@ CHECK: vmov.i32 d4, #0x0 @ encoding: [0x10,0x40,0x80,0xf2]
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@ CHECK: vmov.i32 d4, #0x42000000 @ encoding: [0x12,0x46,0x84,0xf2]
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@ Test encoding of floating point constants for vmov functions
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@ vfp3
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vmov.f32 s5, #1.0
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vmov.f32 s5, #0.125
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vmov.f32 s5, #-1.875
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vmov.f32 s5, #-0.59375
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vmov.f64 d6, #1.0
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vmov.f64 d6, #0.125
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vmov.f64 d6, #-1.875
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vmov.f64 d6, #-0.59375
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@ neon
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vmov.f32 d7, #1.0
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vmov.f32 d7, #0.125
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vmov.f32 d7, #-1.875
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vmov.f32 d7, #-0.59375
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vmov.f32 q8, #1.0
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vmov.f32 q8, #0.125
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vmov.f32 q8, #-1.875
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vmov.f32 q8, #-0.59375
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@ CHECK: vmov.f32 s5, #1.000000e+00 @ encoding: [0x00,0x2a,0xf7,0xee]
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@ CHECK: vmov.f32 s5, #1.250000e-01 @ encoding: [0x00,0x2a,0xf4,0xee]
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@ CHECK: vmov.f32 s5, #-1.875000e+00 @ encoding: [0x0e,0x2a,0xff,0xee]
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@ CHECK: vmov.f32 s5, #-5.937500e-01 @ encoding: [0x03,0x2a,0xfe,0xee]
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@ CHECK: vmov.f64 d6, #1.000000e+00 @ encoding: [0x00,0x6b,0xb7,0xee]
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@ CHECK: vmov.f64 d6, #1.250000e-01 @ encoding: [0x00,0x6b,0xb4,0xee]
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@ CHECK: vmov.f64 d6, #-1.875000e+00 @ encoding: [0x0e,0x6b,0xbf,0xee]
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@ CHECK: vmov.f64 d6, #-5.937500e-01 @ encoding: [0x03,0x6b,0xbe,0xee]
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@ CHECK: vmov.f32 d7, #1.000000e+00 @ encoding: [0x10,0x7f,0x87,0xf2]
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@ CHECK: vmov.f32 d7, #1.250000e-01 @ encoding: [0x10,0x7f,0x84,0xf2]
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@ CHECK: vmov.f32 d7, #-1.875000e+00 @ encoding: [0x1e,0x7f,0x87,0xf3]
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@ CHECK: vmov.f32 d7, #-5.937500e-01 @ encoding: [0x13,0x7f,0x86,0xf3]
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@ CHECK: vmov.f32 q8, #1.000000e+00 @ encoding: [0x50,0x0f,0xc7,0xf2]
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@ CHECK: vmov.f32 q8, #1.250000e-01 @ encoding: [0x50,0x0f,0xc4,0xf2]
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@ CHECK: vmov.f32 q8, #-1.875000e+00 @ encoding: [0x5e,0x0f,0xc7,0xf3]
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@ CHECK: vmov.f32 q8, #-5.937500e-01 @ encoding: [0x53,0x0f,0xc6,0xf3]
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