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R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies

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This prevents a future commit from regressing the load-i1.ll test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208887 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard
2014-05-15 14:41:55 +00:00
parent c1de569ce8
commit 704fe35d88
2 changed files with 28 additions and 7 deletions
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17
lib/Target/R600/SIFixSGPRCopies.cpp
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@@ -259,14 +259,17 @@ bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
break;
}
case AMDGPU::INSERT_SUBREG: {
const TargetRegisterClass *DstRC, *SrcRC;
const TargetRegisterClass *DstRC, *Src0RC, *Src1RC;
DstRC = MRI.getRegClass(MI.getOperand(0).getReg());
SrcRC = MRI.getRegClass(MI.getOperand(1).getReg());
if (!TRI->isSGPRClass(DstRC) || !TRI->hasVGPRs(SrcRC))
break;
DEBUG(dbgs() << " Fixing INSERT_SUBREG:\n");
DEBUG(MI.print(dbgs()));
TII->moveToVALU(MI);
Src0RC = MRI.getRegClass(MI.getOperand(1).getReg());
Src1RC = MRI.getRegClass(MI.getOperand(2).getReg());
if (TRI->isSGPRClass(DstRC) &&
(TRI->hasVGPRs(Src0RC) || TRI->hasVGPRs(Src1RC))) {
DEBUG(dbgs() << " Fixing INSERT_SUBREG:\n");
DEBUG(MI.print(dbgs()));
TII->moveToVALU(MI);
}
break;
}
}
}