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ARM encoding information for [SU]SAT* instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116768 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2059,50 +2059,94 @@ def UHSUB8 : AAI<0b01100111, 0b11111111, "uhsub8">;
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// Unsigned Sum of Absolute Differences [and Accumulate] -- for disassembly only
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def USAD8 : AI<(outs GPR:$dst), (ins GPR:$a, GPR:$b),
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def USAD8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
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MulFrm /* for convenience */, NoItinerary, "usad8",
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"\t$dst, $a, $b", []>,
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"\t$Rd, $Rn, $Rm", []>,
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Requires<[IsARM, HasV6]> {
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bits<4> Rd;
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bits<4> Rn;
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bits<4> Rm;
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let Inst{27-20} = 0b01111000;
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let Inst{15-12} = 0b1111;
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let Inst{7-4} = 0b0001;
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let Inst{19-16} = Rd;
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let Inst{11-8} = Rm;
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let Inst{3-0} = Rn;
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}
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def USADA8 : AI<(outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
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def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
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MulFrm /* for convenience */, NoItinerary, "usada8",
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"\t$dst, $a, $b, $acc", []>,
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"\t$Rd, $Rn, $Rm, $Ra", []>,
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Requires<[IsARM, HasV6]> {
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bits<4> Rd;
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bits<4> Rn;
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bits<4> Rm;
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bits<4> Ra;
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let Inst{27-20} = 0b01111000;
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let Inst{7-4} = 0b0001;
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let Inst{19-16} = Rd;
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let Inst{15-12} = Ra;
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let Inst{11-8} = Rm;
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let Inst{3-0} = Rn;
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}
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// Signed/Unsigned saturate -- for disassembly only
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def SSAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, shift_imm:$sh),
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SatFrm, NoItinerary, "ssat", "\t$dst, $bit_pos, $a$sh",
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def SSAT : AI<(outs GPR:$Rd), (ins i32imm:$sat_imm, GPR:$a, shift_imm:$sh),
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SatFrm, NoItinerary, "ssat", "\t$Rd, $sat_imm, $a$sh",
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[/* For disassembly only; pattern left blank */]> {
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bits<4> Rd;
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bits<5> sat_imm;
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bits<4> Rn;
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bits<8> sh;
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let Inst{27-21} = 0b0110101;
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let Inst{5-4} = 0b01;
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let Inst{20-16} = sat_imm;
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let Inst{15-12} = Rd;
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let Inst{11-7} = sh{7-3};
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let Inst{6} = sh{0};
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let Inst{3-0} = Rn;
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}
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def SSAT16 : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a), SatFrm,
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NoItinerary, "ssat16", "\t$dst, $bit_pos, $a",
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def SSAT16 : AI<(outs GPR:$Rd), (ins i32imm:$sat_imm, GPR:$Rn), SatFrm,
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NoItinerary, "ssat16", "\t$Rd, $sat_imm, $Rn",
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[/* For disassembly only; pattern left blank */]> {
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bits<4> Rd;
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bits<4> sat_imm;
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bits<4> Rn;
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let Inst{27-20} = 0b01101010;
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let Inst{7-4} = 0b0011;
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let Inst{11-4} = 0b11110011;
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let Inst{15-12} = Rd;
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let Inst{19-16} = sat_imm;
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let Inst{3-0} = Rn;
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}
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def USAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, shift_imm:$sh),
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SatFrm, NoItinerary, "usat", "\t$dst, $bit_pos, $a$sh",
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def USAT : AI<(outs GPR:$Rd), (ins i32imm:$sat_imm, GPR:$a, shift_imm:$sh),
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SatFrm, NoItinerary, "usat", "\t$Rd, $sat_imm, $a$sh",
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[/* For disassembly only; pattern left blank */]> {
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bits<4> Rd;
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bits<5> sat_imm;
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bits<4> Rn;
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bits<8> sh;
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let Inst{27-21} = 0b0110111;
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let Inst{5-4} = 0b01;
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let Inst{15-12} = Rd;
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let Inst{11-7} = sh{7-3};
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let Inst{6} = sh{0};
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let Inst{20-16} = sat_imm;
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let Inst{3-0} = Rn;
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}
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def USAT16 : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a), SatFrm,
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NoItinerary, "usat16", "\t$dst, $bit_pos, $a",
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def USAT16 : AI<(outs GPR:$Rd), (ins i32imm:$sat_imm, GPR:$a), SatFrm,
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NoItinerary, "usat16", "\t$Rd, $sat_imm, $a",
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[/* For disassembly only; pattern left blank */]> {
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bits<4> Rd;
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bits<4> sat_imm;
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bits<4> Rn;
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let Inst{27-20} = 0b01101110;
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let Inst{7-4} = 0b0011;
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let Inst{11-4} = 0b11110011;
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let Inst{15-12} = Rd;
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let Inst{19-16} = sat_imm;
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let Inst{3-0} = Rn;
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}
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def : ARMV6Pat<(int_arm_ssat GPR:$a, imm:$pos), (SSAT imm:$pos, GPR:$a, 0)>;
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