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https://github.com/c64scene-ar/llvm-6502.git
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This is another case where instcombine demanded bits optimization created
large immediates. Add dag combine logic to recover in case the large immediates doesn't fit in cmp immediate operand field. int foo(unsigned long l) { return (l>> 47) == 1; } we produce %shr.mask = and i64 %l, -140737488355328 %cmp = icmp eq i64 %shr.mask, 140737488355328 %conv = zext i1 %cmp to i32 ret i32 %conv which codegens to movq $0xffff800000000000,%rax andq %rdi,%rax movq $0x0000800000000000,%rcx cmpq %rcx,%rax sete %al movzbl %al,%eax ret TargetLowering::SimplifySetCC would transform (X & -256) == 256 -> (X >> 8) == 1 if the immediate fails the isLegalICmpImmediate() test. For x86, that's immediates which are not a signed 32-bit immediate. Based on a patch by Eli Friedman. PR10328 rdar://9758774 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160346 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -91,7 +91,7 @@ F:
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}
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; rdar://11866926
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define i32 @test7(i64 %res) nounwind uwtable readnone ssp {
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define i32 @test7(i64 %res) nounwind {
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entry:
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; CHECK: test7:
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; CHECK-NOT: movabsq
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@ -103,7 +103,7 @@ entry:
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ret i32 %lnot.ext
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}
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define i32 @test8(i64 %res) nounwind uwtable readnone ssp {
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define i32 @test8(i64 %res) nounwind {
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entry:
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; CHECK: test8:
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; CHECK-NOT: movabsq
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@ -114,7 +114,7 @@ entry:
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ret i32 %lnot.ext
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}
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define i32 @test9(i64 %res) nounwind uwtable readnone ssp {
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define i32 @test9(i64 %res) nounwind {
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entry:
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; CHECK: test9:
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; CHECK-NOT: movabsq
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@ -126,7 +126,7 @@ entry:
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ret i32 %lnot.ext
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}
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define i32 @test10(i64 %res) nounwind uwtable readnone ssp {
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define i32 @test10(i64 %res) nounwind {
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entry:
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; CHECK: test10:
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; CHECK-NOT: movabsq
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@ -138,3 +138,16 @@ entry:
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ret i32 %lnot.ext
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}
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; rdar://9758774
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define i32 @test11(i64 %l) nounwind {
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entry:
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; CHECK: test11:
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; CHECK-NOT: movabsq
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; CHECK-NOT: andq
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; CHECK: shrq $47, %rdi
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; CHECK: cmpq $1, %rdi
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%shr.mask = and i64 %l, -140737488355328
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%cmp = icmp eq i64 %shr.mask, 140737488355328
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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