This is another case where instcombine demanded bits optimization created

large immediates. Add dag combine logic to recover in case the large
immediates doesn't fit in cmp immediate operand field.

int foo(unsigned long l) {
  return (l>> 47) == 1;
}

we produce

  %shr.mask = and i64 %l, -140737488355328
  %cmp = icmp eq i64 %shr.mask, 140737488355328
  %conv = zext i1 %cmp to i32
  ret i32 %conv

which codegens to

movq    $0xffff800000000000,%rax
andq    %rdi,%rax
movq    $0x0000800000000000,%rcx
cmpq    %rcx,%rax
sete    %al
movzbl    %al,%eax
ret

TargetLowering::SimplifySetCC would transform
(X & -256) == 256 -> (X >> 8) == 1
if the immediate fails the isLegalICmpImmediate() test. For x86,
that's immediates which are not a signed 32-bit immediate.

Based on a patch by Eli Friedman.

PR10328
rdar://9758774


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160346 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2012-07-17 06:53:39 +00:00
parent 06a27cc1aa
commit 70e10d3fe4
4 changed files with 58 additions and 4 deletions

View File

@ -91,7 +91,7 @@ F:
}
; rdar://11866926
define i32 @test7(i64 %res) nounwind uwtable readnone ssp {
define i32 @test7(i64 %res) nounwind {
entry:
; CHECK: test7:
; CHECK-NOT: movabsq
@ -103,7 +103,7 @@ entry:
ret i32 %lnot.ext
}
define i32 @test8(i64 %res) nounwind uwtable readnone ssp {
define i32 @test8(i64 %res) nounwind {
entry:
; CHECK: test8:
; CHECK-NOT: movabsq
@ -114,7 +114,7 @@ entry:
ret i32 %lnot.ext
}
define i32 @test9(i64 %res) nounwind uwtable readnone ssp {
define i32 @test9(i64 %res) nounwind {
entry:
; CHECK: test9:
; CHECK-NOT: movabsq
@ -126,7 +126,7 @@ entry:
ret i32 %lnot.ext
}
define i32 @test10(i64 %res) nounwind uwtable readnone ssp {
define i32 @test10(i64 %res) nounwind {
entry:
; CHECK: test10:
; CHECK-NOT: movabsq
@ -138,3 +138,16 @@ entry:
ret i32 %lnot.ext
}
; rdar://9758774
define i32 @test11(i64 %l) nounwind {
entry:
; CHECK: test11:
; CHECK-NOT: movabsq
; CHECK-NOT: andq
; CHECK: shrq $47, %rdi
; CHECK: cmpq $1, %rdi
%shr.mask = and i64 %l, -140737488355328
%cmp = icmp eq i64 %shr.mask, 140737488355328
%conv = zext i1 %cmp to i32
ret i32 %conv
}