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Move debug options out of header files so that the header does not have

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to #include CommandLine.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2712 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-05-22 17:08:27 +00:00
parent 59dcbf9c03
commit 70e60cbd4d
8 changed files with 28 additions and 20 deletions
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7
lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
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@ -11,17 +11,22 @@
#include "llvm/Support/CFG.h"
#include "Support/PostOrderIterator.h"
#include "Support/SetOperations.h"
#include "Support/CommandLine.h"
#include <iostream>
AnalysisID FunctionLiveVarInfo::ID(AnalysisID::create<FunctionLiveVarInfo>());
cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::Hidden,
LiveVarDebugLevel_t DEBUG_LV;
static cl::Enum<LiveVarDebugLevel_t> DEBUG_LV_opt(DEBUG_LV, "dlivevar", cl::Hidden,
"enable live-variable debugging information",
clEnumValN(LV_DEBUG_None , "n", "disable debug output"),
clEnumValN(LV_DEBUG_Normal , "y", "enable debug output"),
clEnumValN(LV_DEBUG_Instr, "i", "print live-var sets before/after every machine instrn"),
clEnumValN(LV_DEBUG_Verbose, "v", "print def, use sets for every instrn also"), 0);
//-----------------------------------------------------------------------------
// Accessor Functions
//-----------------------------------------------------------------------------

5
lib/CodeGen/InstrSched/InstrScheduling.cpp
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@ -13,13 +13,14 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instruction.h"
#include "Support/CommandLine.h"
#include <algorithm>
using std::cerr;
using std::vector;
//************************* External Data Types *****************************/
SchedDebugLevel_t SchedDebugLevel;
cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::Hidden,
static cl::Enum<enum SchedDebugLevel_t> Opt(SchedDebugLevel,"dsched",cl::Hidden,
"enable instruction scheduling debugging information",
clEnumValN(Sched_NoDebugInfo, "n", "disable debug output"),
clEnumValN(Sched_Disable, "off", "disable instruction scheduling"),

3
lib/CodeGen/InstrSched/SchedPriorities.h
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@ -24,7 +24,6 @@
#include "SchedGraph.h"
#include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/Target/MachineSchedInfo.h"
#include "Support/CommandLine.h"
#include <list>
#include <ext/hash_set>
#include <iostream>
@ -44,7 +43,7 @@ enum SchedDebugLevel_t {
Sched_PrintSchedGraphs,
};
extern cl::Enum<SchedDebugLevel_t> SchedDebugLevel;
extern SchedDebugLevel_t SchedDebugLevel;
//---------------------------------------------------------------------------
// Function: instrIsFeasible

9
lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
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@ -24,15 +24,14 @@
#include "llvm/Type.h"
#include "llvm/iOther.h"
#include "llvm/CodeGen/RegAllocCommon.h"
#include "Support/CommandLine.h"
#include <iostream>
#include <math.h>
using std::cerr;
// ***TODO: There are several places we add instructions. Validate the order
// of adding these instructions.
cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::Hidden,
RegAllocDebugLevel_t DEBUG_RA;
static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",
cl::Hidden,
"enable register allocation debugging information",
clEnumValN(RA_DEBUG_None , "n", "disable debug output"),
clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"),

5
lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
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@ -13,13 +13,14 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instruction.h"
#include "Support/CommandLine.h"
#include <algorithm>
using std::cerr;
using std::vector;
//************************* External Data Types *****************************/
SchedDebugLevel_t SchedDebugLevel;
cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::Hidden,
static cl::Enum<enum SchedDebugLevel_t> Opt(SchedDebugLevel,"dsched",cl::Hidden,
"enable instruction scheduling debugging information",
clEnumValN(Sched_NoDebugInfo, "n", "disable debug output"),
clEnumValN(Sched_Disable, "off", "disable instruction scheduling"),

3
lib/Target/SparcV9/InstrSched/SchedPriorities.h
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@ -24,7 +24,6 @@
#include "SchedGraph.h"
#include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/Target/MachineSchedInfo.h"
#include "Support/CommandLine.h"
#include <list>
#include <ext/hash_set>
#include <iostream>
@ -44,7 +43,7 @@ enum SchedDebugLevel_t {
Sched_PrintSchedGraphs,
};
extern cl::Enum<SchedDebugLevel_t> SchedDebugLevel;
extern SchedDebugLevel_t SchedDebugLevel;
//---------------------------------------------------------------------------
// Function: instrIsFeasible

7
lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp
View File

@ -11,17 +11,22 @@
#include "llvm/Support/CFG.h"
#include "Support/PostOrderIterator.h"
#include "Support/SetOperations.h"
#include "Support/CommandLine.h"
#include <iostream>
AnalysisID FunctionLiveVarInfo::ID(AnalysisID::create<FunctionLiveVarInfo>());
cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::Hidden,
LiveVarDebugLevel_t DEBUG_LV;
static cl::Enum<LiveVarDebugLevel_t> DEBUG_LV_opt(DEBUG_LV, "dlivevar", cl::Hidden,
"enable live-variable debugging information",
clEnumValN(LV_DEBUG_None , "n", "disable debug output"),
clEnumValN(LV_DEBUG_Normal , "y", "enable debug output"),
clEnumValN(LV_DEBUG_Instr, "i", "print live-var sets before/after every machine instrn"),
clEnumValN(LV_DEBUG_Verbose, "v", "print def, use sets for every instrn also"), 0);
//-----------------------------------------------------------------------------
// Accessor Functions
//-----------------------------------------------------------------------------

9
lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
View File

@ -24,15 +24,14 @@
#include "llvm/Type.h"
#include "llvm/iOther.h"
#include "llvm/CodeGen/RegAllocCommon.h"
#include "Support/CommandLine.h"
#include <iostream>
#include <math.h>
using std::cerr;
// ***TODO: There are several places we add instructions. Validate the order
// of adding these instructions.
cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::Hidden,
RegAllocDebugLevel_t DEBUG_RA;
static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",
cl::Hidden,
"enable register allocation debugging information",
clEnumValN(RA_DEBUG_None , "n", "disable debug output"),
clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"),