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Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137325 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2011-08-11 19:00:18 +00:00
parent 59353b436a
commit 71156a6e00
2 changed files with 4 additions and 3 deletions
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2
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -978,6 +978,8 @@ static bool DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn,
else if (!P && writeback)
idx_mode = ARMII::IndexModePost;
if (writeback && (Rn == 15 || Rn == Rt)) return false; // UNPREDICTABLE
if (reg) {
if (!DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)) return false;
ARM_AM::ShiftOpc Opc = ARM_AM::lsl;

5
test/MC/Disassembler/ARM/invalid-LDRB_POST-arm.txt
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@ -1,11 +1,10 @@
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
# XFAIL: *
# Opcode=140 Name=LDRB_POST Format=ARM_FORMAT_LDFRM(6)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 0| 0: 1: 1: 0| 1: 1: 0: 1| 0: 1: 1: 1| 0: 1: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 1|
# -------------------------------------------------------------------------------------------------
#
#
# if wback && (n == 15 || n == t) then UNPREDICTABLE
0x05 0x70 0xd7 0xe6