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[x86] Add coverage for PMUL* instruction testing on SSE2 as well as

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SSE4.1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214001 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth
2014-07-26 01:11:10 +00:00
parent df6b3e5829
commit 72d05e0035
1 changed files with 50 additions and 19 deletions
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69
test/CodeGen/X86/pmul.ll
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@@ -1,38 +1,57 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE41
define <4 x i32> @a(<4 x i32> %i) nounwind { define <4 x i32> @a(<4 x i32> %i) nounwind {
; CHECK-LABEL: a: ; SSE2-LABEL: a:
; CHECK: pmulld ; SSE2: movdqa {{.*}}, %[[X1:xmm[0-9]+]]
; CHECK-NEXT: retq ; SSE2-NEXT: pshufd {{.*}} # [[X2:xmm[0-9]+]] = xmm0[1,0,3,0]
; SSE2-NEXT: pmuludq %[[X1]], %xmm0
; SSE2-NEXT: pmuludq %[[X1]], %[[X2]]
; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2],[[X2]][0,2]
; SSE2-NEXT: pshufd {{.*}} # xmm0 = xmm0[0,2,1,3]
; SSE2-NEXT: retq
;
; SSE41-LABEL: a:
; SSE41: pmulld
; SSE41-NEXT: retq
entry: entry:
%A = mul <4 x i32> %i, < i32 117, i32 117, i32 117, i32 117 > %A = mul <4 x i32> %i, < i32 117, i32 117, i32 117, i32 117 >
ret <4 x i32> %A ret <4 x i32> %A
} }
define <2 x i64> @b(<2 x i64> %i) nounwind { define <2 x i64> @b(<2 x i64> %i) nounwind {
; CHECK-LABEL: b: ; ALL-LABEL: b:
; CHECK: pmuludq ; ALL: pmuludq
; CHECK: pmuludq ; ALL: pmuludq
; CHECK: pmuludq ; ALL: pmuludq
entry: entry:
%A = mul <2 x i64> %i, < i64 117, i64 117 > %A = mul <2 x i64> %i, < i64 117, i64 117 >
ret <2 x i64> %A ret <2 x i64> %A
} }
define <4 x i32> @c(<4 x i32> %i, <4 x i32> %j) nounwind { define <4 x i32> @c(<4 x i32> %i, <4 x i32> %j) nounwind {
; CHECK-LABEL: c: ; SSE2-LABEL: c:
; CHECK: pmulld ; SSE2: pshufd {{.*}} # [[X2:xmm[0-9]+]] = xmm0[1,0,3,0]
; CHECK-NEXT: retq ; SSE2-NEXT: pmuludq %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*}} # xmm1 = xmm1[1,0,3,0]
; SSE2-NEXT: pmuludq %[[X2]], %xmm1
; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2],xmm1[0,2]
; SSE2-NEXT: pshufd {{.*}} # xmm0 = xmm0[0,2,1,3]
; SSE2-NEXT: retq
;
; SSE41-LABEL: c:
; SSE41: pmulld
; SSE41-NEXT: retq
entry: entry:
%A = mul <4 x i32> %i, %j %A = mul <4 x i32> %i, %j
ret <4 x i32> %A ret <4 x i32> %A
} }
define <2 x i64> @d(<2 x i64> %i, <2 x i64> %j) nounwind { define <2 x i64> @d(<2 x i64> %i, <2 x i64> %j) nounwind {
; CHECK-LABEL: d: ; ALL-LABEL: d:
; CHECK: pmuludq ; ALL: pmuludq
; CHECK: pmuludq ; ALL: pmuludq
; CHECK: pmuludq ; ALL: pmuludq
entry: entry:
%A = mul <2 x i64> %i, %j %A = mul <2 x i64> %i, %j
ret <2 x i64> %A ret <2 x i64> %A
@@ -41,10 +60,22 @@ entry:
declare void @foo() declare void @foo()
define <4 x i32> @e(<4 x i32> %i, <4 x i32> %j) nounwind { define <4 x i32> @e(<4 x i32> %i, <4 x i32> %j) nounwind {
; CHECK-LABEL: e: ; SSE2-LABEL: e:
; CHECK: pmulld {{[0-9]+}}(%rsp), %xmm ; SSE2: movdqa {{[0-9]*}}(%rsp), %[[X1:xmm[0-9]+]]
; CHECK-NEXT: addq ${{[0-9]+}}, %rsp ; SSE2-NEXT: pshufd {{.*}} # xmm0 = [[X2]][1,0,3,0]
; CHECK-NEXT: retq ; SSE2-NEXT: movdqa {{[0-9]*}}(%rsp), %[[X2:xmm[0-9]+]]
; SSE2-NEXT: pmuludq %[[X2]], %[[X1]]
; SSE2-NEXT: pshufd {{.*}} # [[X2]] = [[X2]][1,0,3,0]
; SSE2-NEXT: pmuludq %xmm0, %[[X2]]
; SSE2-NEXT: shufps {{.*}} # [[X1]] = [[X1]][0,2],[[X2]][0,2]
; SSE2-NEXT: pshufd {{.*}} # xmm0 = [[X1]][0,2,1,3]
; SSE2-NEXT: addq ${{[0-9]+}}, %rsp
; SSE2-NEXT: retq
;
; SSE41-LABEL: e:
; SSE41: pmulld {{[0-9]+}}(%rsp), %xmm
; SSE41-NEXT: addq ${{[0-9]+}}, %rsp
; SSE41-NEXT: retq
entry: entry:
; Use a call to force spills. ; Use a call to force spills.
call void @foo() call void @foo()