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Use the CDG to mark branches alive on demand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -10,9 +10,10 @@
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#include "llvm/Instruction.h"
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#include "llvm/Instruction.h"
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#include "llvm/Type.h"
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#include "llvm/Type.h"
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#include "llvm/Analysis/Dominators.h"
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#include "llvm/Analysis/Dominators.h"
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#include <set>
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#include "llvm/Tools/STLExtras.h"
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#include "llvm/Analysis/Writer.h"
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#include "llvm/Analysis/Writer.h"
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#include <set>
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#include <algorithm>
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// ADCE Class
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// ADCE Class
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@ -47,7 +48,10 @@ private:
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WorkList.push_back(I);
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WorkList.push_back(I);
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}
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}
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inline void markTerminatorLive(const BasicBlock *BB) {
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cerr << "Marking Term Live\n";
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markInstructionLive((Instruction*)BB->back());
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}
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};
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};
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@ -63,15 +67,14 @@ bool ADCE::doADCE() {
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for (Method::inst_iterator II = M->inst_begin(); II != M->inst_end(); ) {
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for (Method::inst_iterator II = M->inst_begin(); II != M->inst_end(); ) {
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Instruction *I = *II;
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Instruction *I = *II;
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switch (I->getInstType()) {
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switch (I->getInstType()) {
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case Instruction::Ret:
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case Instruction::Call:
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case Instruction::Call:
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case Instruction::Store:
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case Instruction::Store:
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markInstructionLive(I);
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markInstructionLive(I);
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break;
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break;
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default:
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default:
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if (I->getType() == Type::VoidTy) {
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// Check to see if anything is trivially dead
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markInstructionLive(I); // Catches terminators and friends
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if (I->use_size() == 0 && I->getType() != Type::VoidTy) {
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} else {
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if (I->use_size() == 0) { // Check to see if anything is trivially dead
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// Remove the instruction from it's basic block...
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// Remove the instruction from it's basic block...
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BasicBlock *BB = I->getParent();
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BasicBlock *BB = I->getParent();
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delete BB->getInstList().remove(II.getInstructionIterator());
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delete BB->getInstList().remove(II.getInstructionIterator());
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@ -81,24 +84,45 @@ bool ADCE::doADCE() {
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continue; // Don't increment the iterator past the current slot
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continue; // Don't increment the iterator past the current slot
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}
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}
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}
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}
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}
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++II; // Increment the iterator
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++II; // Increment the iterator
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}
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}
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// Compute the control dependence graph...
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cfg::DominanceFrontier CDG(cfg::DominatorSet(M, true));
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cerr << "Processing work list\n";
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cerr << "Processing work list\n";
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// AliveBlocks - Set of basic blocks that we know have instructions that are
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// alive in them...
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//
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set<BasicBlock*> AliveBlocks;
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// Process the work list of instructions that just became live... if they
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// Process the work list of instructions that just became live... if they
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// became live, then that means that all of their operands are neccesary as
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// became live, then that means that all of their operands are neccesary as
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// well... make them live as well.
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// well... make them live as well.
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//
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//
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while (!WorkList.empty()) {
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while (!WorkList.empty()) {
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Instruction *I = WorkList.back();
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Instruction *I = WorkList.back(); // Get an instruction that became live...
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WorkList.pop_back();
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WorkList.pop_back();
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for (unsigned op = 0; Value *Op = I->getOperand(op); ++op) {
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BasicBlock *BB = I->getParent();
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Instruction *Operand = Op->castInstruction();
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if (AliveBlocks.count(BB) == 0) { // Basic block not alive yet...
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// Mark the basic block as being newly ALIVE... and mark all branches that
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// this block is control dependant on as being alive also...
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//
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AliveBlocks.insert(BB); // Block is now ALIVE!
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cfg::DominanceFrontier::const_iterator It = CDG.find(BB);
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if (It != CDG.end()) {
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// Get the blocks that this node is control dependant on...
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const cfg::DominanceFrontier::DomSetType &CDB = It->second;
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for_each(CDB.begin(), CDB.end(), // Mark all their terminators as live
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bind_obj(this, &ADCE::markTerminatorLive));
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}
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}
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for (unsigned op = 0, End = I->getNumOperands(); op != End; ++op) {
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Instruction *Operand = I->getOperand(op)->castInstruction();
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if (Operand) markInstructionLive(Operand);
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if (Operand) markInstructionLive(Operand);
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}
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}
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}
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}
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