mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-03-10 18:37:01 +00:00
- Reapply r106066 now that the bzip2 build regression has been fixed.
- 2010-06-25-CoalescerSubRegDefDead.ll is the testcase for r106878. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106880 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
39d258aa49
commit
730c07e50d
@ -25,7 +25,6 @@
|
||||
#include "llvm/Target/TargetRegisterInfo.h"
|
||||
#include "llvm/Target/TargetInstrInfo.h"
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
#include "llvm/ADT/SmallSet.h"
|
||||
#include "llvm/ADT/Statistic.h"
|
||||
#include "llvm/Support/Debug.h"
|
||||
#include "llvm/Support/raw_ostream.h"
|
||||
@ -62,7 +61,6 @@ namespace {
|
||||
bool ProcessBlock(MachineBasicBlock &MBB);
|
||||
bool SinkInstruction(MachineInstr *MI, bool &SawStore);
|
||||
bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const;
|
||||
bool LiveOutOfBasicBlock(const MachineInstr *MI, unsigned Reg) const;
|
||||
};
|
||||
} // end anonymous namespace
|
||||
|
||||
@ -168,44 +166,6 @@ bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
|
||||
return MadeChange;
|
||||
}
|
||||
|
||||
/// LiveOutOfBasicBlock - Determine if the physical register, defined and dead
|
||||
/// in MI, is live on exit from the basic block.
|
||||
bool MachineSinking::LiveOutOfBasicBlock(const MachineInstr *MI,
|
||||
unsigned Reg) const {
|
||||
assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
|
||||
"Only want to determine if a physical register is live out of a BB!");
|
||||
|
||||
const MachineBasicBlock *MBB = MI->getParent();
|
||||
SmallSet<unsigned, 8> KilledRegs;
|
||||
MachineBasicBlock::const_iterator I = MBB->end();
|
||||
MachineBasicBlock::const_iterator E = MBB->begin();
|
||||
assert(I != E && "How can there be an empty block at this point?!");
|
||||
|
||||
// Loop through the instructions bottom-up. If we see a kill of the preg
|
||||
// first, then it's not live out of the BB. If we see a use or def first, then
|
||||
// we assume that it is live out of the BB.
|
||||
do {
|
||||
const MachineInstr &CurMI = *--I;
|
||||
|
||||
for (unsigned i = 0, e = CurMI.getNumOperands(); i != e; ++i) {
|
||||
const MachineOperand &MO = CurMI.getOperand(i);
|
||||
if (!MO.isReg()) continue; // Ignore non-register operands.
|
||||
|
||||
unsigned MOReg = MO.getReg();
|
||||
if (MOReg == 0) continue;
|
||||
|
||||
if (MOReg == Reg) {
|
||||
if (MO.isKill())
|
||||
return false;
|
||||
if (MO.isUse() || MO.isDef())
|
||||
return true;
|
||||
}
|
||||
}
|
||||
} while (I != E);
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/// SinkInstruction - Determine whether it is safe to sink the specified machine
|
||||
/// instruction out of its current block into a successor.
|
||||
bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
|
||||
@ -228,7 +188,6 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
|
||||
// SuccToSinkTo - This is the successor to sink this instruction to, once we
|
||||
// decide.
|
||||
MachineBasicBlock *SuccToSinkTo = 0;
|
||||
SmallVector<unsigned, 4> PhysRegs;
|
||||
|
||||
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
||||
const MachineOperand &MO = MI->getOperand(i);
|
||||
@ -257,12 +216,9 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
|
||||
if (AllocatableSet.test(AliasReg))
|
||||
return false;
|
||||
}
|
||||
} else {
|
||||
if (!MO.isDead())
|
||||
// A def that isn't dead. We can't move it.
|
||||
return false;
|
||||
else
|
||||
PhysRegs.push_back(Reg);
|
||||
} else if (!MO.isDead()) {
|
||||
// A def that isn't dead. We can't move it.
|
||||
return false;
|
||||
}
|
||||
} else {
|
||||
// Virtual register uses are always safe to sink.
|
||||
@ -329,10 +285,14 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
|
||||
// If the instruction to move defines a dead physical register which is live
|
||||
// when leaving the basic block, don't move it because it could turn into a
|
||||
// "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>)
|
||||
for (SmallVectorImpl<unsigned>::const_iterator
|
||||
I = PhysRegs.begin(), E = PhysRegs.end(); I != E; ++I)
|
||||
if (LiveOutOfBasicBlock(MI, *I))
|
||||
for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
|
||||
const MachineOperand &MO = MI->getOperand(I);
|
||||
if (!MO.isReg()) continue;
|
||||
unsigned Reg = MO.getReg();
|
||||
if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
|
||||
if (SuccToSinkTo->isLiveIn(Reg))
|
||||
return false;
|
||||
}
|
||||
|
||||
DEBUG(dbgs() << "Sink instr " << *MI << "\tinto block " << *SuccToSinkTo);
|
||||
|
||||
|
@ -8477,22 +8477,42 @@ X86TargetLowering::EmitLoweredSelect(MachineInstr *MI,
|
||||
MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
|
||||
unsigned Opc =
|
||||
X86::GetCondBranchFromCond((X86::CondCode)MI->getOperand(3).getImm());
|
||||
|
||||
BuildMI(BB, DL, TII->get(Opc)).addMBB(sinkMBB);
|
||||
F->insert(It, copy0MBB);
|
||||
F->insert(It, sinkMBB);
|
||||
|
||||
// Update machine-CFG edges by first adding all successors of the current
|
||||
// block to the new block which will contain the Phi node for the select.
|
||||
for (MachineBasicBlock::succ_iterator I = BB->succ_begin(),
|
||||
E = BB->succ_end(); I != E; ++I)
|
||||
sinkMBB->addSuccessor(*I);
|
||||
|
||||
// Next, remove all successors of the current block, and add the true
|
||||
// and fallthrough blocks as its successors.
|
||||
while (!BB->succ_empty())
|
||||
BB->removeSuccessor(BB->succ_begin());
|
||||
|
||||
// Add the true and fallthrough blocks as its successors.
|
||||
BB->addSuccessor(copy0MBB);
|
||||
BB->addSuccessor(sinkMBB);
|
||||
|
||||
// If the EFLAGS register isn't dead in the terminator, then claim that it's
|
||||
// live into the sink and copy blocks.
|
||||
const MachineFunction *MF = BB->getParent();
|
||||
const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
|
||||
BitVector ReservedRegs = TRI->getReservedRegs(*MF);
|
||||
const MachineInstr *Term = BB->getFirstTerminator();
|
||||
|
||||
for (unsigned I = 0, E = Term->getNumOperands(); I != E; ++I) {
|
||||
const MachineOperand &MO = Term->getOperand(I);
|
||||
if (!MO.isReg() || MO.isKill() || MO.isDead()) continue;
|
||||
unsigned Reg = MO.getReg();
|
||||
if (Reg != X86::EFLAGS) continue;
|
||||
copy0MBB->addLiveIn(Reg);
|
||||
sinkMBB->addLiveIn(Reg);
|
||||
}
|
||||
|
||||
// copy0MBB:
|
||||
// %FalseValue = ...
|
||||
// # fallthrough to sinkMBB
|
||||
|
39
test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll
Normal file
39
test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll
Normal file
@ -0,0 +1,39 @@
|
||||
; RUN: llc -O1 -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim < %s | FileCheck %s
|
||||
; <rdar://problem/8124405>
|
||||
|
||||
%struct.type = type { %struct.subtype*, i32, i8, i32, i8, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, [256 x i32], i32, [257 x i32], [257 x i32], i32*, i16*, i8*, i32, i32, i32, i32, i32, [256 x i8], [16 x i8], [256 x i8], [4096 x i8], [16 x i32], [18002 x i8], [18002 x i8], [6 x [258 x i8]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, i32*, i32* }
|
||||
%struct.subtype = type { i8*, i32, i32, i32, i8*, i32, i32, i32, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i8* }
|
||||
|
||||
define i32 @func(%struct.type* %s) nounwind optsize ssp {
|
||||
entry:
|
||||
%tmp1 = getelementptr inbounds %struct.type* %s, i32 0, i32 1
|
||||
%tmp2 = load i32* %tmp1, align 8
|
||||
%tmp3 = icmp eq i32 %tmp2, 10
|
||||
%tmp4 = getelementptr inbounds %struct.type* %s, i32 0, i32 40
|
||||
br i1 %tmp3, label %bb, label %entry.bb1_crit_edge
|
||||
|
||||
entry.bb1_crit_edge:
|
||||
br label %bb1
|
||||
|
||||
bb:
|
||||
|
||||
; The point of this code is that %rdi is set to %rdi+64036 for the rep;stosl
|
||||
; statement. It can be an ADD or LEA instruction, it's not important which one
|
||||
; it is.
|
||||
;
|
||||
; CHECK: ## %bb
|
||||
; CHECK-NEXT: addq $64036, %rdi
|
||||
; CHECK: rep;stosl
|
||||
|
||||
%tmp5 = bitcast i32* %tmp4 to i8*
|
||||
call void @llvm.memset.p0i8.i64(i8* %tmp5, i8 0, i64 84, i32 4, i1 false)
|
||||
%tmp6 = getelementptr inbounds %struct.type* %s, i32 0, i32 62
|
||||
store i32* null, i32** %tmp6, align 8
|
||||
br label %bb1
|
||||
|
||||
bb1:
|
||||
store i32 10, i32* %tmp1, align 8
|
||||
ret i32 42
|
||||
}
|
||||
|
||||
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
|
@ -1,10 +1,4 @@
|
||||
; RUN: llc < %s | FileCheck %s
|
||||
; XFAIL: *
|
||||
;
|
||||
; See <rdar://problem/8030636>. This test isn't valid after we made machine
|
||||
; sinking more conservative about sinking instructions that define a preg into a
|
||||
; block when we don't know if the preg is killed within the current block.
|
||||
|
||||
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
|
||||
target triple = "x86_64-apple-darwin10.0.0"
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user