6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-12 23:37:33 +00:00
Code Issues Projects Releases Wiki Activity

movaps, movapd encoding bug.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26192 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-02-15 00:11:37 +00:00
parent fed5d9dbd3
commit 7335f9beea
1 changed files with 8 additions and 8 deletions

16
lib/Target/X86/X86InstrInfo.td

@ -3015,34 +3015,34 @@ def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
def MOVAPSrr : I<0x28, MRMSrcMem, (ops V4F4:$dst, V4F4:$src),
"movaps {$src, $dst|$dst, $src}", []>,
Requires<[HasSSE1]>, XS;
Requires<[HasSSE1]>, TB;
def MOVAPDrr : I<0x28, MRMSrcMem, (ops V2F8:$dst, V2F8:$src),
"movapd {$src, $dst|$dst, $src}", []>,
Requires<[HasSSE2]>, XD;
Requires<[HasSSE2]>, TB, OpSize;
def MOVAPSrm : I<0x28, MRMSrcMem, (ops V4F4:$dst, f128mem:$src),
"movaps {$src, $dst|$dst, $src}", []>,
Requires<[HasSSE1]>, XS;
Requires<[HasSSE1]>, TB;
def MOVAPSmr : I<0x29, MRMDestMem, (ops f128mem:$dst, V4F4:$src),
"movaps {$src, $dst|$dst, $src}",[]>,
Requires<[HasSSE1]>, XD;
Requires<[HasSSE1]>, TB;
def MOVAPDrm : I<0x28, MRMSrcMem, (ops V2F8:$dst, f128mem:$src),
"movapd {$src, $dst|$dst, $src}", []>,
Requires<[HasSSE1]>, XD;
Requires<[HasSSE1]>, TB, OpSize;
def MOVAPDmr : I<0x29, MRMDestMem, (ops f128mem:$dst, V2F8:$src),
"movapd {$src, $dst|$dst, $src}",[]>,
Requires<[HasSSE2]>, XD;
Requires<[HasSSE2]>, TB, OpSize;
// Pseudo-instructions to load FR32 / FR64 from f128mem using movaps / movapd.
// Upper bits are disregarded.
def MOVSAPSrm : I<0x28, MRMSrcMem, (ops FR32:$dst, f128mem:$src),
"movaps {$src, $dst|$dst, $src}",
[(set FR32:$dst, (X86loadpf32 addr:$src))]>,
Requires<[HasSSE1]>, XS;
Requires<[HasSSE1]>, TB;
def MOVSAPDrm : I<0x28, MRMSrcMem, (ops FR64:$dst, f128mem:$src),
"movapd {$src, $dst|$dst, $src}",
[(set FR64:$dst, (X86loadpf64 addr:$src))]>,
Requires<[HasSSE1]>, XD;
Requires<[HasSSE2]>, TB, OpSize;
//===----------------------------------------------------------------------===//