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Added support for condition code loading/stroing in methods cpReg2Reg etc.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@911 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ruchira Sasanka
2001-10-18 22:38:52 +00:00
parent 97b8b4410a
commit 735d6e3ee2
2 changed files with 8 additions and 2 deletions
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6
lib/Target/SparcV9/SparcV9RegInfo.cpp
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@@ -621,6 +621,8 @@ MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg,
switch( RegType ) {
case IntRegType:
case IntCCRegType:
case FloatCCRegType:
MI = new MachineInstr(ADD, 3);
MI->SetMachineOperand(0, SrcReg, false);
MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
@@ -664,6 +666,8 @@ MachineInstr * UltraSparcRegInfo::cpReg2MemMI(const unsigned SrcReg,
switch( RegType ) {
case IntRegType:
case IntCCRegType:
case FloatCCRegType:
MI = new MachineInstr(STX, 3);
MI->SetMachineOperand(0, DestPtrReg, false);
MI->SetMachineOperand(1, SrcReg, false);
@@ -711,6 +715,8 @@ MachineInstr * UltraSparcRegInfo::cpMem2RegMI(const unsigned SrcPtrReg,
switch( RegType ) {
case IntRegType:
case IntCCRegType:
case FloatCCRegType:
MI = new MachineInstr(LDX, 3);
MI->SetMachineOperand(0, SrcPtrReg, false);
MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,