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Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem

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to IntrReadWriteArgMem, as it's for reading as well as writing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110395 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2010-08-05 23:36:21 +00:00
parent ac09835a22
commit 7365c091f9
9 changed files with 102 additions and 123 deletions
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67
include/llvm/Intrinsics.td
View File

@@ -19,10 +19,11 @@ include "llvm/CodeGen/ValueTypes.td"
class IntrinsicProperty; class IntrinsicProperty;
// Intr*Mem - Memory properties. An intrinsic is allowed to have exactly one of // Intr*Mem - Memory properties. An intrinsic is allowed to have at most one of
// these properties set. They are listed from the most aggressive (best to use // these properties set. They are listed from the most aggressive (best to use
// if correct) to the least aggressive. If no property is set, the worst case // if correct) to the least aggressive. If no property is set, the worst case
// is assumed (IntrWriteMem). // is assumed (it may read and write any memory it can get access to and it may
// have other side effects).
// IntrNoMem - The intrinsic does not access memory or have any other side // IntrNoMem - The intrinsic does not access memory or have any other side
// effects. It may be CSE'd deleted if dead, etc. // effects. It may be CSE'd deleted if dead, etc.
@@ -37,15 +38,11 @@ def IntrReadArgMem : IntrinsicProperty;
// deleted if dead. // deleted if dead.
def IntrReadMem : IntrinsicProperty; def IntrReadMem : IntrinsicProperty;
// IntrWriteArgMem - This intrinsic reads and writes only from memory that one // IntrReadWriteArgMem - This intrinsic reads and writes only from memory that
// of its arguments points to, but may access an unspecified amount. The reads // one of its arguments points to, but may access an unspecified amount. The
// and writes may be volatile, but except for this it has no other side effects. // reads and writes may be volatile, but except for this it has no other side
def IntrWriteArgMem : IntrinsicProperty; // effects.
def IntrReadWriteArgMem : IntrinsicProperty;
// IntrWriteMem - This intrinsic may read or modify unspecified memory or has
// other side effects. It cannot be modified by the optimizer. This is the
// default if the intrinsic has no other Intr*Mem property.
def IntrWriteMem : IntrinsicProperty;
// Commutative - This intrinsic is commutative: X op Y == Y op X. // Commutative - This intrinsic is commutative: X op Y == Y op X.
def Commutative : IntrinsicProperty; def Commutative : IntrinsicProperty;
@@ -190,7 +187,7 @@ def int_gcread : Intrinsic<[llvm_ptr_ty],
[IntrReadArgMem]>; [IntrReadArgMem]>;
def int_gcwrite : Intrinsic<[], def int_gcwrite : Intrinsic<[],
[llvm_ptr_ty, llvm_ptr_ty, llvm_ptrptr_ty], [llvm_ptr_ty, llvm_ptr_ty, llvm_ptrptr_ty],
[IntrWriteArgMem, NoCapture<1>, NoCapture<2>]>; [IntrReadWriteArgMem, NoCapture<1>, NoCapture<2>]>;
//===--------------------- Code Generator Intrinsics ----------------------===// //===--------------------- Code Generator Intrinsics ----------------------===//
// //
@@ -204,21 +201,19 @@ def int_stacksave : Intrinsic<[llvm_ptr_ty]>,
def int_stackrestore : Intrinsic<[], [llvm_ptr_ty]>, def int_stackrestore : Intrinsic<[], [llvm_ptr_ty]>,
GCCBuiltin<"__builtin_stack_restore">; GCCBuiltin<"__builtin_stack_restore">;
// IntrWriteArgMem is more pessimistic than strictly necessary for prefetch, // IntrReadWriteArgMem is more pessimistic than strictly necessary for prefetch,
// however it does conveniently prevent the prefetch from being reordered // however it does conveniently prevent the prefetch from being reordered
// with respect to nearby accesses to the same memory. // with respect to nearby accesses to the same memory.
def int_prefetch : Intrinsic<[], def int_prefetch : Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteArgMem, NoCapture<0>]>; [IntrReadWriteArgMem, NoCapture<0>]>;
def int_pcmarker : Intrinsic<[], [llvm_i32_ty]>; def int_pcmarker : Intrinsic<[], [llvm_i32_ty]>;
def int_readcyclecounter : Intrinsic<[llvm_i64_ty]>; def int_readcyclecounter : Intrinsic<[llvm_i64_ty]>;
// Stack Protector Intrinsic - The stackprotector intrinsic writes the stack // Stack Protector Intrinsic - The stackprotector intrinsic writes the stack
// guard to the correct place on the stack frame. // guard to the correct place on the stack frame.
def int_stackprotector : Intrinsic<[], def int_stackprotector : Intrinsic<[], [llvm_ptr_ty, llvm_ptrptr_ty], []>;
[llvm_ptr_ty, llvm_ptrptr_ty],
[IntrWriteMem]>;
//===------------------- Standard C Library Intrinsics --------------------===// //===------------------- Standard C Library Intrinsics --------------------===//
// //
@@ -226,15 +221,15 @@ def int_stackprotector : Intrinsic<[],
def int_memcpy : Intrinsic<[], def int_memcpy : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty, [llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty], llvm_i32_ty, llvm_i1_ty],
[IntrWriteArgMem, NoCapture<0>, NoCapture<1>]>; [IntrReadWriteArgMem, NoCapture<0>, NoCapture<1>]>;
def int_memmove : Intrinsic<[], def int_memmove : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty, [llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty], llvm_i32_ty, llvm_i1_ty],
[IntrWriteArgMem, NoCapture<0>, NoCapture<1>]>; [IntrReadWriteArgMem, NoCapture<0>, NoCapture<1>]>;
def int_memset : Intrinsic<[], def int_memset : Intrinsic<[],
[llvm_anyptr_ty, llvm_i8_ty, llvm_anyint_ty, [llvm_anyptr_ty, llvm_i8_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty], llvm_i32_ty, llvm_i1_ty],
[IntrWriteArgMem, NoCapture<0>]>; [IntrReadWriteArgMem, NoCapture<0>]>;
// These functions do not actually read memory, but they are sensitive to the // These functions do not actually read memory, but they are sensitive to the
// rounding mode. This needs to be modelled separately; in the meantime // rounding mode. This needs to be modelled separately; in the meantime
@@ -331,7 +326,7 @@ def int_annotation : Intrinsic<[llvm_anyint_ty],
// //
def int_init_trampoline : Intrinsic<[llvm_ptr_ty], def int_init_trampoline : Intrinsic<[llvm_ptr_ty],
[llvm_ptr_ty, llvm_ptr_ty, llvm_ptr_ty], [llvm_ptr_ty, llvm_ptr_ty, llvm_ptr_ty],
[IntrWriteArgMem]>, [IntrReadWriteArgMem]>,
GCCBuiltin<"__builtin_init_trampoline">; GCCBuiltin<"__builtin_init_trampoline">;
//===------------------------ Overflow Intrinsics -------------------------===// //===------------------------ Overflow Intrinsics -------------------------===//
@@ -369,79 +364,79 @@ def int_memory_barrier : Intrinsic<[],
def int_atomic_cmp_swap : Intrinsic<[llvm_anyint_ty], def int_atomic_cmp_swap : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>, LLVMMatchType<0>], LLVMMatchType<0>, LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_val_compare_and_swap">; GCCBuiltin<"__sync_val_compare_and_swap">;
def int_atomic_load_add : Intrinsic<[llvm_anyint_ty], def int_atomic_load_add : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_add">; GCCBuiltin<"__sync_fetch_and_add">;
def int_atomic_swap : Intrinsic<[llvm_anyint_ty], def int_atomic_swap : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_lock_test_and_set">; GCCBuiltin<"__sync_lock_test_and_set">;
def int_atomic_load_sub : Intrinsic<[llvm_anyint_ty], def int_atomic_load_sub : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_sub">; GCCBuiltin<"__sync_fetch_and_sub">;
def int_atomic_load_and : Intrinsic<[llvm_anyint_ty], def int_atomic_load_and : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_and">; GCCBuiltin<"__sync_fetch_and_and">;
def int_atomic_load_or : Intrinsic<[llvm_anyint_ty], def int_atomic_load_or : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_or">; GCCBuiltin<"__sync_fetch_and_or">;
def int_atomic_load_xor : Intrinsic<[llvm_anyint_ty], def int_atomic_load_xor : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_xor">; GCCBuiltin<"__sync_fetch_and_xor">;
def int_atomic_load_nand : Intrinsic<[llvm_anyint_ty], def int_atomic_load_nand : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_nand">; GCCBuiltin<"__sync_fetch_and_nand">;
def int_atomic_load_min : Intrinsic<[llvm_anyint_ty], def int_atomic_load_min : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_min">; GCCBuiltin<"__sync_fetch_and_min">;
def int_atomic_load_max : Intrinsic<[llvm_anyint_ty], def int_atomic_load_max : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_max">; GCCBuiltin<"__sync_fetch_and_max">;
def int_atomic_load_umin : Intrinsic<[llvm_anyint_ty], def int_atomic_load_umin : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_umin">; GCCBuiltin<"__sync_fetch_and_umin">;
def int_atomic_load_umax : Intrinsic<[llvm_anyint_ty], def int_atomic_load_umax : Intrinsic<[llvm_anyint_ty],
[LLVMAnyPointerType<LLVMMatchType<0>>, [LLVMAnyPointerType<LLVMMatchType<0>>,
LLVMMatchType<0>], LLVMMatchType<0>],
[IntrWriteArgMem, NoCapture<0>]>, [IntrReadWriteArgMem, NoCapture<0>]>,
GCCBuiltin<"__sync_fetch_and_umax">; GCCBuiltin<"__sync_fetch_and_umax">;
//===------------------------- Memory Use Markers -------------------------===// //===------------------------- Memory Use Markers -------------------------===//
// //
def int_lifetime_start : Intrinsic<[], def int_lifetime_start : Intrinsic<[],
[llvm_i64_ty, llvm_ptr_ty], [llvm_i64_ty, llvm_ptr_ty],
[IntrWriteArgMem, NoCapture<1>]>; [IntrReadWriteArgMem, NoCapture<1>]>;
def int_lifetime_end : Intrinsic<[], def int_lifetime_end : Intrinsic<[],
[llvm_i64_ty, llvm_ptr_ty], [llvm_i64_ty, llvm_ptr_ty],
[IntrWriteArgMem, NoCapture<1>]>; [IntrReadWriteArgMem, NoCapture<1>]>;
def int_invariant_start : Intrinsic<[llvm_descriptor_ty], def int_invariant_start : Intrinsic<[llvm_descriptor_ty],
[llvm_i64_ty, llvm_ptr_ty], [llvm_i64_ty, llvm_ptr_ty],
[IntrReadArgMem, NoCapture<1>]>; [IntrReadArgMem, NoCapture<1>]>;
def int_invariant_end : Intrinsic<[], def int_invariant_end : Intrinsic<[],
[llvm_descriptor_ty, llvm_i64_ty, [llvm_descriptor_ty, llvm_i64_ty,
llvm_ptr_ty], llvm_ptr_ty],
[IntrWriteArgMem, NoCapture<2>]>; [IntrReadWriteArgMem, NoCapture<2>]>;
//===-------------------------- Other Intrinsics --------------------------===// //===-------------------------- Other Intrinsics --------------------------===//
// //

16
include/llvm/IntrinsicsARM.td
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@@ -42,7 +42,7 @@ let TargetPrefix = "arm" in { // All intrinsics start with "llvm.arm.".
def int_arm_get_fpscr : GCCBuiltin<"__builtin_arm_get_fpscr">, def int_arm_get_fpscr : GCCBuiltin<"__builtin_arm_get_fpscr">,
Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>; Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
def int_arm_set_fpscr : GCCBuiltin<"__builtin_arm_set_fpscr">, def int_arm_set_fpscr : GCCBuiltin<"__builtin_arm_set_fpscr">,
Intrinsic<[], [llvm_i32_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_i32_ty], []>;
def int_arm_vcvtr : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty], def int_arm_vcvtr : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
[IntrNoMem]>; [IntrNoMem]>;
def int_arm_vcvtru : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty], def int_arm_vcvtru : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
@@ -375,31 +375,31 @@ let TargetPrefix = "arm" in {
// Interleaving vector stores from N-element structures. // Interleaving vector stores from N-element structures.
def int_arm_neon_vst1 : Intrinsic<[], def int_arm_neon_vst1 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty], [llvm_ptr_ty, llvm_anyvector_ty],
[IntrWriteArgMem]>; [IntrReadWriteArgMem]>;
def int_arm_neon_vst2 : Intrinsic<[], def int_arm_neon_vst2 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty, [llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>], [IntrWriteArgMem]>; LLVMMatchType<0>], [IntrReadWriteArgMem]>;
def int_arm_neon_vst3 : Intrinsic<[], def int_arm_neon_vst3 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty, [llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>], LLVMMatchType<0>, LLVMMatchType<0>],
[IntrWriteArgMem]>; [IntrReadWriteArgMem]>;
def int_arm_neon_vst4 : Intrinsic<[], def int_arm_neon_vst4 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty, [llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
LLVMMatchType<0>], [IntrWriteArgMem]>; LLVMMatchType<0>], [IntrReadWriteArgMem]>;
// Vector store N-element structure from one lane. // Vector store N-element structure from one lane.
def int_arm_neon_vst2lane : Intrinsic<[], def int_arm_neon_vst2lane : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty, [llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, llvm_i32_ty], LLVMMatchType<0>, llvm_i32_ty],
[IntrWriteArgMem]>; [IntrReadWriteArgMem]>;
def int_arm_neon_vst3lane : Intrinsic<[], def int_arm_neon_vst3lane : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty, [llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
llvm_i32_ty], [IntrWriteArgMem]>; llvm_i32_ty], [IntrReadWriteArgMem]>;
def int_arm_neon_vst4lane : Intrinsic<[], def int_arm_neon_vst4lane : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty, [llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
LLVMMatchType<0>, llvm_i32_ty], LLVMMatchType<0>, llvm_i32_ty],
[IntrWriteArgMem]>; [IntrReadWriteArgMem]>;
} }

47
include/llvm/IntrinsicsPowerPC.td
View File

@@ -18,17 +18,17 @@
// Non-altivec intrinsics. // Non-altivec intrinsics.
let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.". let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
// dcba/dcbf/dcbi/dcbst/dcbt/dcbz/dcbzl(PPC970) instructions. // dcba/dcbf/dcbi/dcbst/dcbt/dcbz/dcbzl(PPC970) instructions.
def int_ppc_dcba : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_ppc_dcba : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbf : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_ppc_dcbf : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbi : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_ppc_dcbi : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbst : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_ppc_dcbst : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbt : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_ppc_dcbt : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbtst: Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_ppc_dcbtst: Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbz : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_ppc_dcbz : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbzl : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_ppc_dcbzl : Intrinsic<[], [llvm_ptr_ty], []>;
// sync instruction // sync instruction
def int_ppc_sync : Intrinsic<[], [], [IntrWriteMem]>; def int_ppc_sync : Intrinsic<[], [], []>;
} }
@@ -86,31 +86,31 @@ class PowerPC_Vec_WWW_Intrinsic<string GCCIntSuffix>
let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.". let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
// Data Stream Control. // Data Stream Control.
def int_ppc_altivec_dss : GCCBuiltin<"__builtin_altivec_dss">, def int_ppc_altivec_dss : GCCBuiltin<"__builtin_altivec_dss">,
Intrinsic<[], [llvm_i32_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_i32_ty], []>;
def int_ppc_altivec_dssall : GCCBuiltin<"__builtin_altivec_dssall">, def int_ppc_altivec_dssall : GCCBuiltin<"__builtin_altivec_dssall">,
Intrinsic<[], [], [IntrWriteMem]>; Intrinsic<[], [], []>;
def int_ppc_altivec_dst : GCCBuiltin<"__builtin_altivec_dst">, def int_ppc_altivec_dst : GCCBuiltin<"__builtin_altivec_dst">,
Intrinsic<[], Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>; []>;
def int_ppc_altivec_dstt : GCCBuiltin<"__builtin_altivec_dstt">, def int_ppc_altivec_dstt : GCCBuiltin<"__builtin_altivec_dstt">,
Intrinsic<[], Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>; []>;
def int_ppc_altivec_dstst : GCCBuiltin<"__builtin_altivec_dstst">, def int_ppc_altivec_dstst : GCCBuiltin<"__builtin_altivec_dstst">,
Intrinsic<[], Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>; []>;
def int_ppc_altivec_dststt : GCCBuiltin<"__builtin_altivec_dststt">, def int_ppc_altivec_dststt : GCCBuiltin<"__builtin_altivec_dststt">,
Intrinsic<[], Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>; []>;
// VSCR access. // VSCR access.
def int_ppc_altivec_mfvscr : GCCBuiltin<"__builtin_altivec_mfvscr">, def int_ppc_altivec_mfvscr : GCCBuiltin<"__builtin_altivec_mfvscr">,
Intrinsic<[llvm_v8i16_ty], [], [IntrReadMem]>; Intrinsic<[llvm_v8i16_ty], [], [IntrReadMem]>;
def int_ppc_altivec_mtvscr : GCCBuiltin<"__builtin_altivec_mtvscr">, def int_ppc_altivec_mtvscr : GCCBuiltin<"__builtin_altivec_mtvscr">,
Intrinsic<[], [llvm_v4i32_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_v4i32_ty], []>;
// Loads. These don't map directly to GCC builtins because they represent the // Loads. These don't map directly to GCC builtins because they represent the
@@ -129,20 +129,15 @@ let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
// Stores. These don't map directly to GCC builtins because they represent the // Stores. These don't map directly to GCC builtins because they represent the
// source address with a single pointer. // source address with a single pointer.
def int_ppc_altivec_stvx : def int_ppc_altivec_stvx :
Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty], Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty], []>;
[IntrWriteMem]>;
def int_ppc_altivec_stvxl : def int_ppc_altivec_stvxl :
Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty], Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty], []>;
[IntrWriteMem]>;
def int_ppc_altivec_stvebx : def int_ppc_altivec_stvebx :
Intrinsic<[], [llvm_v16i8_ty, llvm_ptr_ty], Intrinsic<[], [llvm_v16i8_ty, llvm_ptr_ty], []>;
[IntrWriteMem]>;
def int_ppc_altivec_stvehx : def int_ppc_altivec_stvehx :
Intrinsic<[], [llvm_v8i16_ty, llvm_ptr_ty], Intrinsic<[], [llvm_v8i16_ty, llvm_ptr_ty], []>;
[IntrWriteMem]>;
def int_ppc_altivec_stvewx : def int_ppc_altivec_stvewx :
Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty], Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty], []>;
[IntrWriteMem]>;
// Comparisons setting a vector. // Comparisons setting a vector.
def int_ppc_altivec_vcmpbfp : GCCBuiltin<"__builtin_altivec_vcmpbfp">, def int_ppc_altivec_vcmpbfp : GCCBuiltin<"__builtin_altivec_vcmpbfp">,

65
include/llvm/IntrinsicsX86.td
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@@ -143,24 +143,24 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">, def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v4f32_ty], [IntrWriteMem]>; llvm_v4f32_ty], []>;
} }
// Cacheability support ops // Cacheability support ops
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">, def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v4f32_ty], [IntrWriteMem]>; llvm_v4f32_ty], []>;
def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">, def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
Intrinsic<[], [], [IntrWriteMem]>; Intrinsic<[], [], []>;
} }
// Control register. // Control register.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse_stmxcsr : def int_x86_sse_stmxcsr :
Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty], []>;
def int_x86_sse_ldmxcsr : def int_x86_sse_ldmxcsr :
Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty], []>;
} }
// Misc. // Misc.
@@ -459,26 +459,26 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">, def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v2f64_ty], [IntrWriteMem]>; llvm_v2f64_ty], []>;
def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">, def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v16i8_ty], [IntrWriteMem]>; llvm_v16i8_ty], []>;
def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">, def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v4i32_ty], [IntrWriteMem]>; llvm_v4i32_ty], []>;
} }
// Cacheability support ops // Cacheability support ops
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">, def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v2i64_ty], [IntrWriteMem]>; llvm_v2i64_ty], []>;
def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">, def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v2f64_ty], [IntrWriteMem]>; llvm_v2f64_ty], []>;
def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">, def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_i32_ty], [IntrWriteMem]>; llvm_i32_ty], []>;
} }
// Misc. // Misc.
@@ -498,13 +498,13 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
Intrinsic<[llvm_i32_ty], [llvm_v16i8_ty], [IntrNoMem]>; Intrinsic<[llvm_i32_ty], [llvm_v16i8_ty], [IntrNoMem]>;
def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">, def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
Intrinsic<[], [llvm_v16i8_ty, Intrinsic<[], [llvm_v16i8_ty,
llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>; llvm_v16i8_ty, llvm_ptr_ty], []>;
def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">, def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty], []>;
def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">, def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
Intrinsic<[], [], [IntrWriteMem]>; Intrinsic<[], [], []>;
def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">, def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
Intrinsic<[], [], [IntrWriteMem]>; Intrinsic<[], [], []>;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@@ -546,10 +546,10 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">, def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>; llvm_i32_ty, llvm_i32_ty], []>;
def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">, def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
Intrinsic<[], [llvm_i32_ty, Intrinsic<[], [llvm_i32_ty,
llvm_i32_ty], [IntrWriteMem]>; llvm_i32_ty], []>;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@@ -1363,21 +1363,21 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// SIMD store ops // SIMD store ops
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_avx_storeu_pd_256 : GCCBuiltin<"__builtin_ia32_storeupd256">, def int_x86_avx_storeu_pd_256 : GCCBuiltin<"__builtin_ia32_storeupd256">,
Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty], []>;
def int_x86_avx_storeu_ps_256 : GCCBuiltin<"__builtin_ia32_storeups256">, def int_x86_avx_storeu_ps_256 : GCCBuiltin<"__builtin_ia32_storeups256">,
Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty], []>;
def int_x86_avx_storeu_dq_256 : GCCBuiltin<"__builtin_ia32_storedqu256">, def int_x86_avx_storeu_dq_256 : GCCBuiltin<"__builtin_ia32_storedqu256">,
Intrinsic<[], [llvm_ptr_ty, llvm_v32i8_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty, llvm_v32i8_ty], []>;
} }
// Cacheability support ops // Cacheability support ops
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_avx_movnt_dq_256 : GCCBuiltin<"__builtin_ia32_movntdq256">, def int_x86_avx_movnt_dq_256 : GCCBuiltin<"__builtin_ia32_movntdq256">,
Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty], []>;
def int_x86_avx_movnt_pd_256 : GCCBuiltin<"__builtin_ia32_movntpd256">, def int_x86_avx_movnt_pd_256 : GCCBuiltin<"__builtin_ia32_movntpd256">,
Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty], []>;
def int_x86_avx_movnt_ps_256 : GCCBuiltin<"__builtin_ia32_movntps256">, def int_x86_avx_movnt_ps_256 : GCCBuiltin<"__builtin_ia32_movntps256">,
Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty], [IntrWriteMem]>; Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty], []>;
} }
// Conditional load ops // Conditional load ops
@@ -1396,18 +1396,18 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_avx_maskstore_pd : GCCBuiltin<"__builtin_ia32_maskstorepd">, def int_x86_avx_maskstore_pd : GCCBuiltin<"__builtin_ia32_maskstorepd">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v2f64_ty, llvm_v2f64_ty], [IntrWriteMem]>; llvm_v2f64_ty, llvm_v2f64_ty], []>;
def int_x86_avx_maskstore_ps : GCCBuiltin<"__builtin_ia32_maskstoreps">, def int_x86_avx_maskstore_ps : GCCBuiltin<"__builtin_ia32_maskstoreps">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v4f32_ty, llvm_v4f32_ty], [IntrWriteMem]>; llvm_v4f32_ty, llvm_v4f32_ty], []>;
def int_x86_avx_maskstore_pd_256 : def int_x86_avx_maskstore_pd_256 :
GCCBuiltin<"__builtin_ia32_maskstorepd256">, GCCBuiltin<"__builtin_ia32_maskstorepd256">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v4f64_ty, llvm_v4f64_ty], [IntrWriteMem]>; llvm_v4f64_ty, llvm_v4f64_ty], []>;
def int_x86_avx_maskstore_ps_256 : def int_x86_avx_maskstore_ps_256 :
GCCBuiltin<"__builtin_ia32_maskstoreps256">, GCCBuiltin<"__builtin_ia32_maskstoreps256">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty,
llvm_v8f32_ty, llvm_v8f32_ty], [IntrWriteMem]>; llvm_v8f32_ty, llvm_v8f32_ty], []>;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@@ -1416,9 +1416,9 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// Empty MMX state op. // Empty MMX state op.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">, def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">,
Intrinsic<[], [], [IntrWriteMem]>; Intrinsic<[], [], []>;
def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">, def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">,
Intrinsic<[], [], [IntrWriteMem]>; Intrinsic<[], [], []>;
} }
// Integer arithmetic ops. // Integer arithmetic ops.
@@ -1594,14 +1594,11 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// Misc. // Misc.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">, def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">,
Intrinsic<[], Intrinsic<[], [llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty], []>;
[llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty],
[IntrWriteMem]>;
def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">, def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">,
Intrinsic<[llvm_i32_ty], [llvm_v8i8_ty], [IntrNoMem]>; Intrinsic<[llvm_i32_ty], [llvm_v8i8_ty], [IntrNoMem]>;
def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">, def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
Intrinsic<[], [llvm_ptr_ty, Intrinsic<[], [llvm_ptr_ty, llvm_v1i64_ty], []>;
llvm_v1i64_ty], [IntrWriteMem]>;
} }

12
lib/Target/MBlaze/MBlazeIntrinsics.td
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@@ -17,17 +17,11 @@
// MBlaze intrinsic classes. // MBlaze intrinsic classes.
let TargetPrefix = "mblaze", isTarget = 1 in { let TargetPrefix = "mblaze", isTarget = 1 in {
class MBFSL_Get_Intrinsic : Intrinsic<[llvm_i32_ty], class MBFSL_Get_Intrinsic : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], []>;
[llvm_i32_ty],
[IntrWriteMem]>;
class MBFSL_Put_Intrinsic : Intrinsic<[], class MBFSL_Put_Intrinsic : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty], []>;
[llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>;
class MBFSL_PutT_Intrinsic : Intrinsic<[], class MBFSL_PutT_Intrinsic : Intrinsic<[], [llvm_i32_ty], []>;
[llvm_i32_ty],
[IntrWriteMem]>;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

4
utils/TableGen/CodeGenDAGPatterns.cpp
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@@ -2197,10 +2197,10 @@ private:
if (IntInfo->ModRef >= CodeGenIntrinsic::ReadArgMem) if (IntInfo->ModRef >= CodeGenIntrinsic::ReadArgMem)
mayLoad = true;// These may load memory. mayLoad = true;// These may load memory.
if (IntInfo->ModRef >= CodeGenIntrinsic::WriteArgMem) if (IntInfo->ModRef >= CodeGenIntrinsic::ReadWriteArgMem)
mayStore = true;// Intrinsics that can write to memory are 'mayStore'. mayStore = true;// Intrinsics that can write to memory are 'mayStore'.
if (IntInfo->ModRef >= CodeGenIntrinsic::WriteMem) if (IntInfo->ModRef >= CodeGenIntrinsic::ReadWriteMem)
// WriteMem intrinsics can have other strange effects. // WriteMem intrinsics can have other strange effects.
HasSideEffects = true; HasSideEffects = true;
} }

2
utils/TableGen/CodeGenIntrinsics.h
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@@ -60,7 +60,7 @@ namespace llvm {
// Memory mod/ref behavior of this intrinsic. // Memory mod/ref behavior of this intrinsic.
enum { enum {
NoMem, ReadArgMem, ReadMem, WriteArgMem, WriteMem NoMem, ReadArgMem, ReadMem, ReadWriteArgMem, ReadWriteMem
} ModRef; } ModRef;
/// This is set to true if the intrinsic is overloaded by its argument /// This is set to true if the intrinsic is overloaded by its argument

8
utils/TableGen/CodeGenTarget.cpp
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@@ -434,7 +434,7 @@ std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
TheDef = R; TheDef = R;
std::string DefName = R->getName(); std::string DefName = R->getName();
ModRef = WriteMem; ModRef = ReadWriteMem;
isOverloaded = false; isOverloaded = false;
isCommutative = false; isCommutative = false;
@@ -555,10 +555,8 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
ModRef = ReadArgMem; ModRef = ReadArgMem;
else if (Property->getName() == "IntrReadMem") else if (Property->getName() == "IntrReadMem")
ModRef = ReadMem; ModRef = ReadMem;
else if (Property->getName() == "IntrWriteArgMem") else if (Property->getName() == "IntrReadWriteArgMem")
ModRef = WriteArgMem; ModRef = ReadWriteArgMem;
else if (Property->getName() == "IntrWriteMem")
ModRef = WriteMem;
else if (Property->getName() == "Commutative") else if (Property->getName() == "Commutative")
isCommutative = true; isCommutative = true;
else if (Property->isSubClassOf("NoCapture")) { else if (Property->isSubClassOf("NoCapture")) {

4
utils/TableGen/IntrinsicEmitter.cpp
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@@ -545,7 +545,7 @@ EmitModRefBehavior(const std::vector<CodeGenIntrinsic> &Ints, raw_ostream &OS){
OS << "switch (iid) {\n"; OS << "switch (iid) {\n";
OS << "default:\n return UnknownModRefBehavior;\n"; OS << "default:\n return UnknownModRefBehavior;\n";
for (unsigned i = 0, e = Ints.size(); i != e; ++i) { for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
if (Ints[i].ModRef == CodeGenIntrinsic::WriteMem) if (Ints[i].ModRef == CodeGenIntrinsic::ReadWriteMem)
continue; continue;
OS << "case " << TargetPrefix << "Intrinsic::" << Ints[i].EnumName OS << "case " << TargetPrefix << "Intrinsic::" << Ints[i].EnumName
<< ":\n"; << ":\n";
@@ -559,7 +559,7 @@ EmitModRefBehavior(const std::vector<CodeGenIntrinsic> &Ints, raw_ostream &OS){
case CodeGenIntrinsic::ReadMem: case CodeGenIntrinsic::ReadMem:
OS << " return OnlyReadsMemory;\n"; OS << " return OnlyReadsMemory;\n";
break; break;
case CodeGenIntrinsic::WriteArgMem: case CodeGenIntrinsic::ReadWriteArgMem:
OS << " return AccessesArguments;\n"; OS << " return AccessesArguments;\n";
break; break;
} }