6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-01 00:33:09 +00:00
Code Issues Projects Releases Wiki Activity

Add variable-width shifts for MSP430

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93468 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2010-01-14 22:09:38 +00:00
parent 5fcf52ccf3
commit 74a265686d
1 changed files with 51 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

51
test/CodeGen/MSP430/shifts.ll Normal file
View File

@ -0,0 +1,51 @@
; RUN: llc < %s | FileCheck %s
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8:16"
target triple = "msp430-elf"
define zeroext i8 @lshr8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
entry:
; CHECK: lshr8:
; CHECK: rrc.b
%shr = lshr i8 %a, %cnt
ret i8 %shr
}
define signext i8 @ashr8(i8 signext %a, i8 zeroext %cnt) nounwind readnone {
entry:
; CHECK: ashr8:
; CHECK: rra.b
%shr = ashr i8 %a, %cnt
ret i8 %shr
}
define zeroext i8 @shl8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
entry:
; CHECK: shl8
; CHECK: rla.b
%shl = shl i8 %a, %cnt
ret i8 %shl
}
define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
entry:
; CHECK: lshr16:
; CHECK: rrc.w
%shr = lshr i16 %a, %cnt
ret i16 %shr
}
define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone {
entry:
; CHECK: ashr16:
; CHECK: rra.w
%shr = ashr i16 %a, %cnt
ret i16 %shr
}
define zeroext i16 @shl16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
entry:
; CHECK: shl16:
; CHECK: rla.w
%shl = shl i16 %a, %cnt
ret i16 %shl
}