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X86: Roll repetitive code into a loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231565 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -870,35 +870,16 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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// MMX-sized vectors (other than x86mmx) are expected to be expanded
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// into smaller operations.
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setOperationAction(ISD::MULHS, MVT::v8i8, Expand);
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setOperationAction(ISD::MULHS, MVT::v4i16, Expand);
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setOperationAction(ISD::MULHS, MVT::v2i32, Expand);
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setOperationAction(ISD::MULHS, MVT::v1i64, Expand);
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setOperationAction(ISD::AND, MVT::v8i8, Expand);
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setOperationAction(ISD::AND, MVT::v4i16, Expand);
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setOperationAction(ISD::AND, MVT::v2i32, Expand);
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setOperationAction(ISD::AND, MVT::v1i64, Expand);
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setOperationAction(ISD::OR, MVT::v8i8, Expand);
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setOperationAction(ISD::OR, MVT::v4i16, Expand);
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setOperationAction(ISD::OR, MVT::v2i32, Expand);
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setOperationAction(ISD::OR, MVT::v1i64, Expand);
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setOperationAction(ISD::XOR, MVT::v8i8, Expand);
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setOperationAction(ISD::XOR, MVT::v4i16, Expand);
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setOperationAction(ISD::XOR, MVT::v2i32, Expand);
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setOperationAction(ISD::XOR, MVT::v1i64, Expand);
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setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i8, Expand);
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setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i16, Expand);
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setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i32, Expand);
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setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v1i64, Expand);
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for (MVT MMXTy : {MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64}) {
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setOperationAction(ISD::MULHS, MMXTy, Expand);
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setOperationAction(ISD::AND, MMXTy, Expand);
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setOperationAction(ISD::OR, MMXTy, Expand);
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setOperationAction(ISD::XOR, MMXTy, Expand);
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setOperationAction(ISD::SCALAR_TO_VECTOR, MMXTy, Expand);
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setOperationAction(ISD::SELECT, MMXTy, Expand);
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setOperationAction(ISD::BITCAST, MMXTy, Expand);
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}
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setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v1i64, Expand);
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setOperationAction(ISD::SELECT, MVT::v8i8, Expand);
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setOperationAction(ISD::SELECT, MVT::v4i16, Expand);
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setOperationAction(ISD::SELECT, MVT::v2i32, Expand);
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setOperationAction(ISD::SELECT, MVT::v1i64, Expand);
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setOperationAction(ISD::BITCAST, MVT::v8i8, Expand);
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setOperationAction(ISD::BITCAST, MVT::v4i16, Expand);
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setOperationAction(ISD::BITCAST, MVT::v2i32, Expand);
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setOperationAction(ISD::BITCAST, MVT::v1i64, Expand);
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if (!TM.Options.UseSoftFloat && Subtarget->hasSSE1()) {
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addRegisterClass(MVT::v4f32, &X86::VR128RegClass);
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@ -1064,27 +1045,13 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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}
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if (!TM.Options.UseSoftFloat && Subtarget->hasSSE41()) {
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setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
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setOperationAction(ISD::FCEIL, MVT::f32, Legal);
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setOperationAction(ISD::FTRUNC, MVT::f32, Legal);
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setOperationAction(ISD::FRINT, MVT::f32, Legal);
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setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal);
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setOperationAction(ISD::FFLOOR, MVT::f64, Legal);
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setOperationAction(ISD::FCEIL, MVT::f64, Legal);
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setOperationAction(ISD::FTRUNC, MVT::f64, Legal);
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setOperationAction(ISD::FRINT, MVT::f64, Legal);
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setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal);
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setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal);
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setOperationAction(ISD::FCEIL, MVT::v4f32, Legal);
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setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal);
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setOperationAction(ISD::FRINT, MVT::v4f32, Legal);
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setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal);
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setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal);
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setOperationAction(ISD::FCEIL, MVT::v2f64, Legal);
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setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal);
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setOperationAction(ISD::FRINT, MVT::v2f64, Legal);
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setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Legal);
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for (MVT RoundedTy : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) {
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setOperationAction(ISD::FFLOOR, RoundedTy, Legal);
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setOperationAction(ISD::FCEIL, RoundedTy, Legal);
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setOperationAction(ISD::FTRUNC, RoundedTy, Legal);
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setOperationAction(ISD::FRINT, RoundedTy, Legal);
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setOperationAction(ISD::FNEARBYINT, RoundedTy, Legal);
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}
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// FIXME: Do we need to handle scalar-to-vector here?
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setOperationAction(ISD::MUL, MVT::v4i32, Legal);
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