6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-25 00:33:15 +00:00
Code Issues Projects Releases Wiki Activity

reject pseudo instructions early in the encoder.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107939 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-07-09 00:17:50 +00:00
parent 96716c7b92
commit 757e8d6d2e
2 changed files with 5 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
View File

@ -614,7 +614,6 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
MCInst TmpInst;
MCInstLowering.Lower(MI, TmpInst);
OutStreamer.EmitInstruction(TmpInst);
}

15
lib/Target/X86/X86MCCodeEmitter.cpp
View File

@ -358,11 +358,6 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
const MCInst &MI, const TargetInstrDesc &Desc,
raw_ostream &OS) const {
// Pseudo instructions never have a VEX prefix.
if ((TSFlags & X86II::FormMask) == X86II::Pseudo)
return;
bool HasVEX_4V = false;
if ((TSFlags >> 32) & X86II::VEX_4V)
HasVEX_4V = true;
@ -544,10 +539,6 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
/// size, and 3) use of X86-64 extended registers.
static unsigned DetermineREXPrefix(const MCInst &MI, uint64_t TSFlags,
const TargetInstrDesc &Desc) {
// Pseudo instructions never have a rex byte.
if ((TSFlags & X86II::FormMask) == X86II::Pseudo)
return 0;
unsigned REX = 0;
if (TSFlags & X86II::REX_W)
REX |= 1 << 3; // set REX.W
@ -750,6 +741,9 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
const TargetInstrDesc &Desc = TII.get(Opcode);
uint64_t TSFlags = Desc.TSFlags;
// Pseudo instructions don't get encoded.
if ((TSFlags & X86II::FormMask) == X86II::Pseudo)
return;
// If this is a two-address instruction, skip one of the register operands.
// FIXME: This should be handled during MCInst lowering.
@ -792,7 +786,8 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
assert(0 && "FIXME: Remove this form when the JIT moves to MCCodeEmitter!");
default: errs() << "FORM: " << (TSFlags & X86II::FormMask) << "\n";
assert(0 && "Unknown FormMask value in X86MCCodeEmitter!");
case X86II::Pseudo: return; // Pseudo instructions encode to nothing.
case X86II::Pseudo:
assert(0 && "Pseudo instruction shouldn't be emitted");
case X86II::RawFrm:
EmitByte(BaseOpcode, CurByte, OS);
break;