From 75ac4d9c2dfb22f84da25dec03df7a07f3dad1fa Mon Sep 17 00:00:00 2001
From: Jakob Stoklund Olesen <stoklund@2pi.dk>
Date: Tue, 15 Jun 2010 16:20:57 +0000
Subject: [PATCH] Avoid processing early clobbers twice in RegAllocFast.

Early clobbers defining a virtual register were first alocated to a physreg and
then processed as a physreg EC, spilling the virtreg.

This fixes PR7382.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105998 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/RegAllocFast.cpp                  | 11 +++++--
 .../X86/2010-06-15-FastAllocEarlyCLobber.ll   | 29 +++++++++++++++++++
 2 files changed, 37 insertions(+), 3 deletions(-)
 create mode 100644 test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll

diff --git a/lib/CodeGen/RegAllocFast.cpp b/lib/CodeGen/RegAllocFast.cpp
index 41a3545f046..ea8d4229d97 100644
--- a/lib/CodeGen/RegAllocFast.cpp
+++ b/lib/CodeGen/RegAllocFast.cpp
@@ -708,7 +708,8 @@ void RAFast::AllocateBasicBlock() {
       if (MO.isUse()) {
         usePhysReg(MO);
       } else if (MO.isEarlyClobber()) {
-        definePhysReg(MI, Reg, MO.isDead() ? regFree : regReserved);
+        definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?
+                               regFree : regReserved);
         PhysECs.push_back(Reg);
       }
     }
@@ -731,8 +732,11 @@ void RAFast::AllocateBasicBlock() {
         // Note: defineVirtReg may invalidate MO.
         LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, 0);
         unsigned PhysReg = LRI->second.PhysReg;
-        setPhysReg(MI, i, PhysReg);
+        if (setPhysReg(MI, i, PhysReg))
+          VirtDead.push_back(Reg);
         PhysECs.push_back(PhysReg);
+        // Don't attempt coalescing when earlyclobbers are present.
+        CopyDst = 0;
       }
     }
 
@@ -767,7 +771,8 @@ void RAFast::AllocateBasicBlock() {
     // Allocate defs and collect dead defs.
     for (unsigned i = 0; i != DefOpEnd; ++i) {
       MachineOperand &MO = MI->getOperand(i);
-      if (!MO.isReg() || !MO.isDef() || !MO.getReg()) continue;
+      if (!MO.isReg() || !MO.isDef() || !MO.getReg() || MO.isEarlyClobber())
+        continue;
       unsigned Reg = MO.getReg();
 
       if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
diff --git a/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll b/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
new file mode 100644
index 00000000000..4639866afc5
--- /dev/null
+++ b/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
@@ -0,0 +1,29 @@
+; RUN: llc -regalloc=fast < %s | FileCheck %s
+; PR7382
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+@.str = private constant [23 x i8] c"This should be -1: %d\0A\00" ; <[23 x i8]*> [#uses=1]
+
+define i32 @main() {
+entry:
+  %retval = alloca i32, align 4                   ; <i32*> [#uses=3]
+  %v = alloca i32, align 4                        ; <i32*> [#uses=3]
+  store i32 0, i32* %retval
+  %zero = load i32* %retval
+; The earlyclobber register EC0 should not be spilled before the inline asm.
+; Yes, check-not can refer to FileCheck variables defined in the future.
+; CHECK-NOT: [[EC0]]{{.*}}(%rsp)
+; CHECK: bsr {{[^,]*}}, [[EC0:%...]]
+  %0 = call i32 asm "bsr   $1, $0\0A\09cmovz $2, $0", "=&r,ro,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %zero, i32 -1) nounwind, !srcloc !0 ; <i32> [#uses=1]
+  store i32 %0, i32* %v
+  %tmp = load i32* %v                             ; <i32> [#uses=1]
+  %call1 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([23 x i8]* @.str, i32 0, i32 0), i32 %tmp) ; <i32> [#uses=0]
+  store i32 0, i32* %retval
+  %1 = load i32* %retval                          ; <i32> [#uses=1]
+  ret i32 %0
+}
+
+declare i32 @printf(i8*, ...)
+
+!0 = metadata !{i32 191}