From 75d7f736788a8083a9d5d2e5f812a159b4f03e79 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sat, 13 Sep 2014 19:58:27 +0000 Subject: [PATCH] Fix typo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217730 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIShrinkInstructions.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/R600/SIShrinkInstructions.cpp b/lib/Target/R600/SIShrinkInstructions.cpp index caf2572c11b..c33514f719f 100644 --- a/lib/Target/R600/SIShrinkInstructions.cpp +++ b/lib/Target/R600/SIShrinkInstructions.cpp @@ -213,10 +213,10 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) { unsigned DstReg = MI.getOperand(0).getReg(); if (TargetRegisterInfo::isVirtualRegister(DstReg)) { // VOPC instructions can only write to the VCC register. We can't - // force them to use VCC here, because the register allocator - // has trouble with sequences like this, which cause the allocator - // to run out of registes if vreg0 and vreg1 belong to the VCCReg - // register class: + // force them to use VCC here, because the register allocator has + // trouble with sequences like this, which cause the allocator to run + // out of registers if vreg0 and vreg1 belong to the VCCReg register + // class: // vreg0 = VOPC; // vreg1 = VOPC; // S_AND_B64 vreg0, vreg1