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Pre-regalloc tale duplication. Work in progress.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90759 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2009-12-07 10:15:19 +00:00
parent 4650d92748
commit 75eb535843
3 changed files with 232 additions and 91 deletions
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12
lib/CodeGen/MachineSSAUpdater.cpp
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@@ -207,6 +207,16 @@ void MachineSSAUpdater::RewriteUse(MachineOperand &U) {
U.setReg(NewVR);
}
void MachineSSAUpdater::ReplaceRegWith(unsigned OldReg, unsigned NewReg) {
MRI->replaceRegWith(OldReg, NewReg);
AvailableValsTy &AvailableVals = getAvailableVals(AV);
for (DenseMap<MachineBasicBlock*, unsigned>::iterator
I = AvailableVals.begin(), E = AvailableVals.end(); I != E; ++I)
if (I->second == OldReg)
I->second = NewReg;
}
/// GetValueAtEndOfBlockInternal - Check to see if AvailableVals has an entry
/// for the specified BB and if so, return it. If not, construct SSA form by
/// walking predecessors inserting PHI nodes as needed until we get to a block
@@ -297,7 +307,7 @@ unsigned MachineSSAUpdater::GetValueAtEndOfBlockInternal(MachineBasicBlock *BB){
MachineInstr *OldVal = MRI->getVRegDef(InsertedVal);
// Be careful about dead loops. These RAUW's also update InsertedVal.
assert(InsertedVal != SingularValue && "Dead loop?");
MRI->replaceRegWith(InsertedVal, SingularValue);
ReplaceRegWith(InsertedVal, SingularValue);
OldVal->eraseFromParent();
}