6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-05-19 13:38:56 +00:00
Code Issues Projects Releases Wiki Activity

Added paramters to a few functions in order to allow me to change the functions to preserve SSA

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19615 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tanya Lattner 2005-01-16 08:51:10 +00:00
parent da2ce11407
commit 7600587e66
1 changed files with 16 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
lib/Target/SparcV9/SparcV9BurgISel.cpp
View File

@ -615,7 +615,7 @@ uint64_t ConvertConstantToIntType(const TargetMachine &target, const Value *V,
static inline void static inline void
CreateSETUWConst(uint32_t C, CreateSETUWConst(uint32_t C,
Instruction* dest, std::vector<MachineInstr*>& mvec, Instruction* dest, std::vector<MachineInstr*>& mvec,
bool isSigned = false) { MachineCodeForInstruction& mcfi, Value* val, bool isSigned = false) {
MachineInstr *miSETHI = NULL, *miOR = NULL; MachineInstr *miSETHI = NULL, *miOR = NULL;
// In order to get efficient code, we should not generate the SETHI if // In order to get efficient code, we should not generate the SETHI if
@ -660,9 +660,10 @@ CreateSETUWConst(uint32_t C,
/// ///
static inline void static inline void
CreateSETSWConst(int32_t C, CreateSETSWConst(int32_t C,
Instruction* dest, std::vector<MachineInstr*>& mvec) { Instruction* dest, std::vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi, Value* val) {
// Set the low 32 bits of dest // Set the low 32 bits of dest
CreateSETUWConst((uint32_t) C, dest, mvec, /*isSigned*/true); CreateSETUWConst((uint32_t) C, dest, mvec, mcfi, val, /*isSigned*/true);
// Sign-extend to the high 32 bits if needed. // Sign-extend to the high 32 bits if needed.
// NOTE: The value C = 0x80000000 is bad: -C == C and so -C is < MAXSIMM // NOTE: The value C = 0x80000000 is bad: -C == C and so -C is < MAXSIMM
@ -679,20 +680,21 @@ CreateSETSWConst(int32_t C,
static inline void static inline void
CreateSETXConst(uint64_t C, CreateSETXConst(uint64_t C,
Instruction* tmpReg, Instruction* dest, Instruction* tmpReg, Instruction* dest,
std::vector<MachineInstr*>& mvec) { std::vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi, Value* val) {
assert(C > (unsigned int) ~0 && "Use SETUW/SETSW for 32-bit values!"); assert(C > (unsigned int) ~0 && "Use SETUW/SETSW for 32-bit values!");
MachineInstr* MI; MachineInstr* MI;
// Code to set the upper 32 bits of the value in register `tmpReg' // Code to set the upper 32 bits of the value in register `tmpReg'
CreateSETUWConst((C >> 32), tmpReg, mvec); CreateSETUWConst((C >> 32), tmpReg, mvec, mcfi, val);
// Shift tmpReg left by 32 bits // Shift tmpReg left by 32 bits
mvec.push_back(BuildMI(V9::SLLXi6, 3).addReg(tmpReg).addZImm(32) mvec.push_back(BuildMI(V9::SLLXi6, 3).addReg(tmpReg).addZImm(32)
.addRegDef(tmpReg)); .addRegDef(tmpReg));
// Code to set the low 32 bits of the value in register `dest' // Code to set the low 32 bits of the value in register `dest'
CreateSETUWConst(C, dest, mvec); CreateSETUWConst(C, dest, mvec, mcfi, val);
// dest = OR(tmpReg, dest) // dest = OR(tmpReg, dest)
mvec.push_back(BuildMI(V9::ORr,3).addReg(dest).addReg(tmpReg).addRegDef(dest)); mvec.push_back(BuildMI(V9::ORr,3).addReg(dest).addReg(tmpReg).addRegDef(dest));
@ -776,18 +778,18 @@ CreateSETXLabel(Value* val, Instruction* tmpReg,
static inline void static inline void
CreateUIntSetInstruction(uint64_t C, Instruction* dest, CreateUIntSetInstruction(uint64_t C, Instruction* dest,
std::vector<MachineInstr*>& mvec, std::vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) { MachineCodeForInstruction& mcfi, Value* val) {
static const uint64_t lo32 = (uint32_t) ~0; static const uint64_t lo32 = (uint32_t) ~0;
if (C <= lo32) // High 32 bits are 0. Set low 32 bits. if (C <= lo32) // High 32 bits are 0. Set low 32 bits.
CreateSETUWConst((uint32_t) C, dest, mvec); CreateSETUWConst((uint32_t) C, dest, mvec, mcfi, val);
else if ((C & ~lo32) == ~lo32 && (C & (1U << 31))) { else if ((C & ~lo32) == ~lo32 && (C & (1U << 31))) {
// All high 33 (not 32) bits are 1s: sign-extension will take care // All high 33 (not 32) bits are 1s: sign-extension will take care
// of high 32 bits, so use the sequence for signed int // of high 32 bits, so use the sequence for signed int
CreateSETSWConst((int32_t) C, dest, mvec); CreateSETSWConst((int32_t) C, dest, mvec, mcfi, val);
} else if (C > lo32) { } else if (C > lo32) {
// C does not fit in 32 bits // C does not fit in 32 bits
TmpInstruction* tmpReg = new TmpInstruction(mcfi, Type::IntTy); TmpInstruction* tmpReg = new TmpInstruction(mcfi, Type::IntTy);
CreateSETXConst(C, tmpReg, dest, mvec); CreateSETXConst(C, tmpReg, dest, mvec, mcfi, val);
} }
} }
@ -797,8 +799,8 @@ CreateUIntSetInstruction(uint64_t C, Instruction* dest,
static inline void static inline void
CreateIntSetInstruction(int64_t C, Instruction* dest, CreateIntSetInstruction(int64_t C, Instruction* dest,
std::vector<MachineInstr*>& mvec, std::vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) { MachineCodeForInstruction& mcfi, Value* val) {
CreateUIntSetInstruction((uint64_t) C, dest, mvec, mcfi); CreateUIntSetInstruction((uint64_t) C, dest, mvec, mcfi, val);
} }
/// MaxConstantsTableTy - Table mapping LLVM opcodes to the max. immediate /// MaxConstantsTableTy - Table mapping LLVM opcodes to the max. immediate
@ -1100,9 +1102,9 @@ void CreateCodeToLoadConst(const TargetMachine& target, Function* F,
uint64_t C = ConvertConstantToIntType(target, val, dest->getType(), isValid); uint64_t C = ConvertConstantToIntType(target, val, dest->getType(), isValid);
if (isValid) { if (isValid) {
if (dest->getType()->isSigned()) if (dest->getType()->isSigned())
CreateUIntSetInstruction(C, dest, mvec, mcfi); CreateUIntSetInstruction(C, dest, mvec, mcfi, val);
else else
CreateIntSetInstruction((int64_t) C, dest, mvec, mcfi); CreateIntSetInstruction((int64_t) C, dest, mvec, mcfi, val);
} else { } else {
// Make an instruction sequence to load the constant, viz: // Make an instruction sequence to load the constant, viz: