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Generalize isLoopGuardedByCond's checking to consider two
SCEVUnknowns with identical Instructions to be equal. This allows it to analze cases such as the attached testcase, where the front-end has cloned the loop controlling expression. Along with r73805, this lets IndVarSimplify eliminate all the sign-extend casts in the loop in the attached testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73807 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3655,6 +3655,29 @@ ScalarEvolution::getPredecessorWithUniqueSuccessorForBB(BasicBlock *BB) {
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return 0;
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}
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/// HasSameValue - SCEV structural equivalence is usually sufficient for
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/// testing whether two expressions are equal, however for the purposes of
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/// looking for a condition guarding a loop, it can be useful to be a little
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/// more general, since a front-end may have replicated the controlling
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/// expression.
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///
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static bool HasSameValue(const SCEVHandle &A, const SCEVHandle &B) {
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// Quick check to see if they are the same SCEV.
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if (A == B) return true;
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// Otherwise, if they're both SCEVUnknown, it's possible that they hold
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// two different instructions with the same value. Check for this case.
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if (const SCEVUnknown *AU = dyn_cast<SCEVUnknown>(A))
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if (const SCEVUnknown *BU = dyn_cast<SCEVUnknown>(B))
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if (const Instruction *AI = dyn_cast<Instruction>(AU->getValue()))
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if (const Instruction *BI = dyn_cast<Instruction>(BU->getValue()))
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if (AI->isIdenticalTo(BI))
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return true;
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// Otherwise assume they may have a different value.
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return false;
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}
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/// isLoopGuardedByCond - Test whether entry to the loop is protected by
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/// a conditional between LHS and RHS. This is used to help avoid max
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/// expressions in loop trip counts.
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@ -3755,9 +3778,10 @@ bool ScalarEvolution::isLoopGuardedByCond(const Loop *L,
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SCEVHandle PreCondLHSSCEV = getSCEV(PreCondLHS);
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SCEVHandle PreCondRHSSCEV = getSCEV(PreCondRHS);
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if ((LHS == PreCondLHSSCEV && RHS == PreCondRHSSCEV) ||
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(LHS == getNotSCEV(PreCondRHSSCEV) &&
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RHS == getNotSCEV(PreCondLHSSCEV)))
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if ((HasSameValue(LHS, PreCondLHSSCEV) &&
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HasSameValue(RHS, PreCondRHSSCEV)) ||
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(HasSameValue(LHS, getNotSCEV(PreCondRHSSCEV)) &&
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HasSameValue(RHS, getNotSCEV(PreCondLHSSCEV))))
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return true;
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}
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107
test/Transforms/IndVarSimplify/ashr-tripcount.ll
Normal file
107
test/Transforms/IndVarSimplify/ashr-tripcount.ll
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@ -0,0 +1,107 @@
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; RUN: llvm-as < %s | opt -indvars | llvm-dis > %t
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; RUN: grep sext %t | count 1
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; Indvars should be able to eliminate all of the sign extensions
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; inside the loop.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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@pow_2_tab = external constant [0 x float] ; <[0 x float]*> [#uses=1]
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@pow_2_025_tab = external constant [0 x float] ; <[0 x float]*> [#uses=1]
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@i_pow_2_tab = external constant [0 x float] ; <[0 x float]*> [#uses=1]
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@i_pow_2_025_tab = external constant [0 x float] ; <[0 x float]*> [#uses=1]
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define void @foo(i32 %gain, i32 %noOfLines, i32* %quaSpectrum, float* %iquaSpectrum, float* %pow4_3_tab_ptr) nounwind {
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entry:
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%t0 = icmp slt i32 %gain, 0 ; <i1> [#uses=1]
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br i1 %t0, label %bb1, label %bb2
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bb1: ; preds = %entry
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%t1 = sub i32 0, %gain ; <i32> [#uses=1]
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%t2 = sub i32 0, %gain ; <i32> [#uses=1]
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br label %bb2
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bb2: ; preds = %bb1, %entry
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%pow_2_tab.pn = phi [0 x float]* [ @i_pow_2_tab, %bb1 ], [ @pow_2_tab, %entry ] ; <[0 x float]*> [#uses=1]
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%.pn3.in.in = phi i32 [ %t1, %bb1 ], [ %gain, %entry ] ; <i32> [#uses=1]
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%pow_2_025_tab.pn = phi [0 x float]* [ @i_pow_2_025_tab, %bb1 ], [ @pow_2_025_tab, %entry ] ; <[0 x float]*> [#uses=1]
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%.pn2.in.in = phi i32 [ %t2, %bb1 ], [ %gain, %entry ] ; <i32> [#uses=1]
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%.pn3.in = ashr i32 %.pn3.in.in, 2 ; <i32> [#uses=1]
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%.pn2.in = and i32 %.pn2.in.in, 3 ; <i32> [#uses=1]
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%.pn3 = sext i32 %.pn3.in to i64 ; <i64> [#uses=1]
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%.pn2 = zext i32 %.pn2.in to i64 ; <i64> [#uses=1]
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%.pn.in = getelementptr [0 x float]* %pow_2_tab.pn, i64 0, i64 %.pn3 ; <float*> [#uses=1]
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%.pn1.in = getelementptr [0 x float]* %pow_2_025_tab.pn, i64 0, i64 %.pn2 ; <float*> [#uses=1]
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%.pn = load float* %.pn.in ; <float> [#uses=1]
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%.pn1 = load float* %.pn1.in ; <float> [#uses=1]
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%invQuantizer.0 = fmul float %.pn, %.pn1 ; <float> [#uses=4]
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%t3 = ashr i32 %noOfLines, 2 ; <i32> [#uses=1]
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%t4 = icmp sgt i32 %t3, 0 ; <i1> [#uses=1]
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br i1 %t4, label %bb.nph, label %return
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bb.nph: ; preds = %bb2
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%t5 = ashr i32 %noOfLines, 2 ; <i32> [#uses=1]
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br label %bb3
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bb3: ; preds = %bb4, %bb.nph
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%i.05 = phi i32 [ %t49, %bb4 ], [ 0, %bb.nph ] ; <i32> [#uses=9]
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%k.04 = phi i32 [ %t48, %bb4 ], [ 0, %bb.nph ] ; <i32> [#uses=1]
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%t6 = sext i32 %i.05 to i64 ; <i64> [#uses=1]
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%t7 = getelementptr i32* %quaSpectrum, i64 %t6 ; <i32*> [#uses=1]
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%t8 = load i32* %t7, align 4 ; <i32> [#uses=1]
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%t9 = zext i32 %t8 to i64 ; <i64> [#uses=1]
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%t10 = getelementptr float* %pow4_3_tab_ptr, i64 %t9 ; <float*> [#uses=1]
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%t11 = load float* %t10, align 4 ; <float> [#uses=1]
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%t12 = or i32 %i.05, 1 ; <i32> [#uses=1]
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%t13 = sext i32 %t12 to i64 ; <i64> [#uses=1]
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%t14 = getelementptr i32* %quaSpectrum, i64 %t13 ; <i32*> [#uses=1]
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%t15 = load i32* %t14, align 4 ; <i32> [#uses=1]
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%t16 = zext i32 %t15 to i64 ; <i64> [#uses=1]
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%t17 = getelementptr float* %pow4_3_tab_ptr, i64 %t16 ; <float*> [#uses=1]
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%t18 = load float* %t17, align 4 ; <float> [#uses=1]
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%t19 = or i32 %i.05, 2 ; <i32> [#uses=1]
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%t20 = sext i32 %t19 to i64 ; <i64> [#uses=1]
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%t21 = getelementptr i32* %quaSpectrum, i64 %t20 ; <i32*> [#uses=1]
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%t22 = load i32* %t21, align 4 ; <i32> [#uses=1]
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%t23 = zext i32 %t22 to i64 ; <i64> [#uses=1]
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%t24 = getelementptr float* %pow4_3_tab_ptr, i64 %t23 ; <float*> [#uses=1]
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%t25 = load float* %t24, align 4 ; <float> [#uses=1]
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%t26 = or i32 %i.05, 3 ; <i32> [#uses=1]
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%t27 = sext i32 %t26 to i64 ; <i64> [#uses=1]
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%t28 = getelementptr i32* %quaSpectrum, i64 %t27 ; <i32*> [#uses=1]
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%t29 = load i32* %t28, align 4 ; <i32> [#uses=1]
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%t30 = zext i32 %t29 to i64 ; <i64> [#uses=1]
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%t31 = getelementptr float* %pow4_3_tab_ptr, i64 %t30 ; <float*> [#uses=1]
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%t32 = load float* %t31, align 4 ; <float> [#uses=1]
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%t33 = fmul float %t11, %invQuantizer.0 ; <float> [#uses=1]
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%t34 = sext i32 %i.05 to i64 ; <i64> [#uses=1]
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%t35 = getelementptr float* %iquaSpectrum, i64 %t34 ; <float*> [#uses=1]
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store float %t33, float* %t35, align 4
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%t36 = or i32 %i.05, 1 ; <i32> [#uses=1]
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%t37 = fmul float %t18, %invQuantizer.0 ; <float> [#uses=1]
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%t38 = sext i32 %t36 to i64 ; <i64> [#uses=1]
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%t39 = getelementptr float* %iquaSpectrum, i64 %t38 ; <float*> [#uses=1]
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store float %t37, float* %t39, align 4
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%t40 = or i32 %i.05, 2 ; <i32> [#uses=1]
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%t41 = fmul float %t25, %invQuantizer.0 ; <float> [#uses=1]
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%t42 = sext i32 %t40 to i64 ; <i64> [#uses=1]
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%t43 = getelementptr float* %iquaSpectrum, i64 %t42 ; <float*> [#uses=1]
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store float %t41, float* %t43, align 4
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%t44 = or i32 %i.05, 3 ; <i32> [#uses=1]
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%t45 = fmul float %t32, %invQuantizer.0 ; <float> [#uses=1]
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%t46 = sext i32 %t44 to i64 ; <i64> [#uses=1]
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%t47 = getelementptr float* %iquaSpectrum, i64 %t46 ; <float*> [#uses=1]
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store float %t45, float* %t47, align 4
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%t48 = add i32 %k.04, 1 ; <i32> [#uses=2]
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%t49 = add i32 %i.05, 4 ; <i32> [#uses=1]
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br label %bb4
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bb4: ; preds = %bb3
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%t50 = icmp sgt i32 %t5, %t48 ; <i1> [#uses=1]
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br i1 %t50, label %bb3, label %bb4.return_crit_edge
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bb4.return_crit_edge: ; preds = %bb4
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br label %return
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return: ; preds = %bb4.return_crit_edge, %bb2
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ret void
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}
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