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[ARM] add basic Cortex-A7 support to LLVM backend

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195358 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Artyom Skrobov 2013-11-21 14:03:21 +00:00
parent f89ddfccc0
commit 7663849322
2 changed files with 13 additions and 1 deletions
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11
lib/Target/ARM/ARM.td
View File

@ -180,6 +180,13 @@ def ProcA5 : SubtargetFeature<"a5", "ARMProcFamily", "CortexA5",
[FeatureSlowFPBrcc, FeatureHasSlowFPVMLx,
FeatureVMLxForwarding, FeatureT2XtPk,
FeatureTrustZone]>;
def ProcA7 : SubtargetFeature<"a7", "ARMProcFamily", "CortexA7",
"Cortex-A7 ARM processors",
[FeatureSlowFPBrcc, FeatureHasSlowFPVMLx,
FeatureVMLxForwarding, FeatureT2XtPk,
FeatureVFP4, FeatureMP,
FeatureHWDiv, FeatureHWDivARM,
FeatureTrustZone, FeatureVirtualization]>;
def ProcA8 : SubtargetFeature<"a8", "ARMProcFamily", "CortexA8",
"Cortex-A8 ARM processors",
[FeatureSlowFPBrcc, FeatureHasSlowFPVMLx,
@ -296,6 +303,10 @@ def : ProcessorModel<"cortex-a5", CortexA8Model,
[ProcA5, HasV7Ops, FeatureNEON, FeatureDB,
FeatureVFP4, FeatureDSPThumb2,
FeatureHasRAS, FeatureAClass]>;
def : ProcessorModel<"cortex-a7", CortexA8Model,
[ProcA7, HasV7Ops, FeatureNEON, FeatureDB,
FeatureDSPThumb2, FeatureHasRAS,
FeatureAClass]>;
def : ProcessorModel<"cortex-a8", CortexA8Model,
[ProcA8, HasV7Ops, FeatureNEON, FeatureDB,
FeatureDSPThumb2, FeatureHasRAS,

3
lib/Target/ARM/ARMSubtarget.h
View File

@ -31,7 +31,8 @@ class TargetOptions;
class ARMSubtarget : public ARMGenSubtargetInfo {
protected:
enum ARMProcFamilyEnum {
Others, CortexA5, CortexA8, CortexA9, CortexA15, CortexR5, Swift, CortexA53, CortexA57
Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA15, CortexR5,
Swift, CortexA53, CortexA57
};
enum ARMProcClassEnum {
None, AClass, RClass, MClass